From patchwork Fri Aug 12 08:41:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martyn Welch X-Patchwork-Id: 12942040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 56D5CC00140 for ; Fri, 12 Aug 2022 08:42:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=A0MRxzIS5F8CKdlZBKSp0fr/TSoqAg9J9ql6lYcQBFE=; b=4nvEsvrBcAYfIs eT/hXpuhCUkZrqi/fEpiCN87oKOw5Gf7QJisGh21i1VklrbmcWPI/DQmTCVUT/G1xV4G7TabjfFFj G2hDjvfNA53tbFdGwNMGNOF8ZDtI02+AZFB8wNnan9lVJCmmZSAtOsV8mTh7Z/blO98F3nofwlnk1 BTU5im05uDCfCHLOYsJfUjjak3xs5Pez1X5O85HJDQD2Yo8kz1f1PjjgVWtb3K6RB3Q4BLG1sgchP nmiOywxukPCbzUV4j5J+0jE2SzEFIbTaj+ZZg/NP4euoP+pWN9DF+3gWUNZvAJvxfCjZt7U0fma3r 5rmMYXytdb6o3b8bmluQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oMQEi-0037rT-38; Fri, 12 Aug 2022 08:41:44 +0000 Received: from madras.collabora.co.uk ([46.235.227.172]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oMQEc-0037pj-Lx for linux-arm-kernel@lists.infradead.org; Fri, 12 Aug 2022 08:41:42 +0000 Received: from pan.home (unknown [IPv6:2a00:23c6:c311:3401:fef:5a97:8fe5:76f7]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: martyn) by madras.collabora.co.uk (Postfix) with ESMTPSA id A7CA86601ABA; Fri, 12 Aug 2022 09:41:35 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1660293696; bh=EFYFHwV+cFMr+sooCNJM/WoPiPa3l7eg3xlJG7y5swI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N+F4NJM5sXe5jzoesw9KeQ/Mr4w7U2EkppuOuCSG61h7uJj8jcSJwZHx09iZHcZHk 9HK2eGXMBG5RSnFWO57vYk0MRcQnmda9wF/5Um0gMbJWFaV2Vm7BDhydO4u/0Faqqx m15yelRmQYJ/1pruG4ML8Xt8gc+maHYnLOiKT3U08BFaF73/X8Q6Djlq98hi8Z/8Z2 dg+ufsXhLM8tZaSvJC26h4zUM8Cz+alGvMSr9rpCoRCaPNXsE5Ho5D9bTMWteSs73k 8qQ+bscE6PcPnG5EotuoF6n+FD5EmLrfly7JZTDimnw1df5Rsuy+rBHGAWxnIYSUy8 227T34jgpFMRw== From: Martyn Welch To: Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team Cc: kernel@collabora.com, Martyn Welch , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 2/2] arm64: dts: imx8mp-msc-sm2s: Add device trees for MSC SM2S-IMX8PLUS SoM and carrier board Date: Fri, 12 Aug 2022 09:41:19 +0100 Message-Id: <20220812084120.376042-2-martyn.welch@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220812084120.376042-1-martyn.welch@collabora.com> References: <20220812084120.376042-1-martyn.welch@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220812_014139_104953_0C7A905F X-CRM114-Status: GOOD ( 16.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add device trees for one of a number of MSC's (parent company, Avnet) variants of the SM2S-IMX8PLUS system on module along with the compatible SM2S-SK-AL-EP1 carrier board. As the name suggests, this family of SoMs use the NXP i.MX8MP SoC and provide the SMARC module interface. Signed-off-by: Martyn Welch --- Changes in v2 - Added compatibles - Removed underscores from node names - Make node names more generic - Reorder properties - Fix issues found by dtbs_check in these files Changes in v3: - Switched to avnet vendor string in compatibles - Corrected patch description Changes in v4: - Switched from phy-reset-gpios to reset-gpios, removing duplication - Removed unneeded sdma1 node arch/arm64/boot/dts/freescale/Makefile | 1 + .../freescale/imx8mp-msc-sm2s-14N0600E.dts | 72 ++ .../dts/freescale/imx8mp-msc-sm2s-ep1.dts | 53 ++ .../boot/dts/freescale/imx8mp-msc-sm2s.dtsi | 812 ++++++++++++++++++ 4 files changed, 938 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-14N0600E.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 8bf7f7ecebaa..139c8b95c9c9 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -83,6 +83,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mn-venice-gw7902.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-tqma8mpql-mba8mpxl.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-venice-gw74xx.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-14N0600E.dts b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-14N0600E.dts new file mode 100644 index 000000000000..9e976e8baaee --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-14N0600E.dts @@ -0,0 +1,72 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Avnet Embedded GmbH + */ +/dts-v1/; + +#include "imx8mp-msc-sm2s.dtsi" + +/ { + model = "MSC SM2S-IMX8PLUS-QC6-14N0600E SoM"; + compatible = "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp", + "fsl,imx8mp"; + + memory@40000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0 0x80000000>; /* bank0, 2GiB */ + }; +}; + +&cpu_alert0 { + temperature = <95000>; +}; + +&cpu_crit0 { + temperature = <105000>; +}; + +&soc_alert0 { + temperature = <95000>; +}; + +&soc_crit0 { + temperature = <105000>; +}; + +&tca6424 { + gbe0-int-hog { + gpio-hog; + input; + gpios = <3 GPIO_ACTIVE_LOW>; + }; + + gbe1-int-hog { + gpio-hog; + input; + gpios = <4 GPIO_ACTIVE_LOW>; + }; + + cam2-rst-hog { + gpio-hog; + output-high; + gpios = <9 GPIO_ACTIVE_LOW>; + }; + + cam2-pwr-hog { + gpio-hog; + output-high; + gpios = <10 GPIO_ACTIVE_LOW>; + }; + + tpm-int-hog { + gpio-hog; + input; + gpios = <13 GPIO_ACTIVE_LOW>; + }; + + wifi-int-hog { + gpio-hog; + input; + gpios = <14 GPIO_ACTIVE_LOW>; + }; +}; diff --git a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts new file mode 100644 index 000000000000..523d2d80a3f1 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s-ep1.dts @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Avnet Embedded GmbH + */ + +/dts-v1/; + +#include "imx8mp-msc-sm2s-14N0600E.dts" +#include +#include + +/ { + model = "MSC SM2-MB-EP1 Carrier Board with SM2S-IMX8PLUS-QC6-14N0600E SoM"; + compatible = "avnet,sm2s-imx8mp-14N0600E-ep1", + "avnet,sm2s-imx8mp-14N0600E", "avnet,sm2s-imx8mp", + "fsl,imx8mp"; +}; + +&flexcan1 { + status = "okay"; +}; + +&flexcan2 { + status = "okay"; +}; + +&usdhc2 { + no-1-8-v; +}; + +&iomuxc { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_smarc_gpio>; + + pinctrl_smarc_gpio: smarcgpiosgrp { + fsl,pins = + , /* GPIO0 */ + , /* GPIO1 */ + , /* GPIO2 */ + , /* GPIO3 */ + , /* GPIO4 */ + , /* GPIO5 */ + , /* GPIO6 */ + , /* GPIO7 */ + , /* GPIO8 */ + , /* GPIO9 */ + , /* GPIO10 */ + , /* GPIO11 */ + , /* GPIO12 */ + ; /* GPIO13 */ + }; +}; + diff --git a/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi new file mode 100644 index 000000000000..72e7dfb0a77f --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-msc-sm2s.dtsi @@ -0,0 +1,812 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (C) 2022 Avnet Embedded GmbH + */ + +/dts-v1/; + +#include "imx8mp.dtsi" +#include + +/ { + aliases { + rtc0 = &sys_rtc; + rtc1 = &snvs_rtc; + }; + + chosen { + stdout-path = &uart2; + }; + + reg_usb0_host_vbus: regulator-usb0-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb0_host_vbus"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_vbus>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usb1_host_vbus: regulator-usb1-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb1_host_vbus"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb1_vbus>; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reg_usdhc2_vmmc: regulator-usdhc2 { + compatible = "regulator-fixed"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc2_vmmc>; + regulator-name = "VSD_3V3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; + enable-active-high; + startup-delay-us = <100>; + off-on-delay-us = <12000>; + }; + + reg_flexcan1_xceiver: regulator-flexcan1 { + compatible = "regulator-fixed"; + regulator-name = "flexcan1-xceiver"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + }; + + reg_flexcan2_xceiver: regulator-flexcan2 { + compatible = "regulator-fixed"; + regulator-name = "flexcan2-xceiver"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + }; + + lcd0_backlight: backlight-0 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd0_backlight>; + pwms = <&pwm1 0 100000 0>; + brightness-levels = <0 255>; + num-interpolated-steps = <255>; + default-brightness-level = <255>; + enable-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + lcd1_backlight: backlight-1 { + compatible = "pwm-backlight"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lcd1_backlight>; + pwms = <&pwm2 0 100000 0>; + brightness-levels = <0 255>; + num-interpolated-steps = <255>; + default-brightness-level = <255>; + enable-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_leds>; + status = "okay"; + + led-sw { + label = "sw-led"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + default-state = "off"; + linux,default-trigger = "heartbeat"; + }; + }; + + extcon_usb0: extcon-usb0 { + compatible = "linux,extcon-usb-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usb0_extcon>; + id-gpio = <&gpio1 3 GPIO_ACTIVE_HIGH>; + }; +}; + +&A53_0 { + cpu-supply = <&vcc_arm>; +}; + +&A53_1 { + cpu-supply = <&vcc_arm>; +}; + +&A53_2 { + cpu-supply = <&vcc_arm>; +}; + +&A53_3 { + cpu-supply = <&vcc_arm>; +}; + +&ecspi1 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi1>; + cs-gpios = <0>, <&gpio2 8 GPIO_ACTIVE_LOW>; +}; + +&ecspi2 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_ecspi2>; + cs-gpios = <0>, <&gpio2 9 GPIO_ACTIVE_LOW>; +}; + +&eqos { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_eqos>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy0>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + eee-broken-1000t; + reset-gpios = <&tca6424 16 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,clk-output-sel = ; + }; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_fec>; + phy-mode = "rgmii-id"; + phy-handle = <ðphy1>; + fsl,magic-packet; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy1: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + eee-broken-1000t; + reset-gpios = <&tca6424 17 GPIO_ACTIVE_LOW>; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + ti,rx-internal-delay = ; + ti,tx-internal-delay = ; + ti,fifo-depth = ; + ti,clk-output-sel = ; + }; + }; +}; + +&i2c1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c1>; + clock-frequency = <400000>; + status = "okay"; + + id_eeprom: eeprom@50 { + compatible = "atmel,24c64"; + reg = <0x50>; + pagesize = <32>; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + clock-frequency = <400000>; + status = "disabled"; +}; + +&i2c3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c3>; + clock-frequency = <400000>; + status = "disabled"; +}; + +&i2c4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; + clock-frequency = <400000>; + status = "disabled"; +}; + +&i2c5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c5>; + clock-frequency = <400000>; + status = "disabled"; +}; + +&i2c6 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c6>; + clock-frequency = <400000>; + status = "okay"; + + tca6424: gpio@22 { + compatible = "ti,tca6424"; + reg = <0x22>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_tca6424>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "BOOT_SEL0#", "BOOT_SEL1#", "BOOT_SEL2#", + "gbe0_int", "gbe1_int", "pmic_int", "rtc_int", "lvds_int", + "PCIE_WAKE#", "cam2_rst", "cam2_pwr", "SLEEP#", + "wifi_pd", "tpm_int", "wifi_int", "PCIE_A_RST#", + "gbe0_rst", "gbe1_rst", "LID#", "BATLOW#", "CHARGING#", + "CHARGER_PRSNT#"; + interrupt-parent = <&gpio1>; + interrupts = <9 IRQ_TYPE_EDGE_RISING>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + dsi_lvds_bridge: bridge@2d { + compatible = "ti,sn65dsi83"; + reg = <0x2d>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_lvds_bridge>; + enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + status = "disabled"; + }; + + pmic: pmic@30 { + compatible = "ricoh,rn5t567"; + reg = <0x30>; + interrupt-parent = <&tca6424>; + interrupts = <5 IRQ_TYPE_EDGE_FALLING>; + + regulators { + DCDC1 { + regulator-name = "VCC_SOC"; + regulator-always-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + }; + DCDC2 { + regulator-name = "VCC_DRAM"; + regulator-always-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + }; + vcc_arm: DCDC3 { + regulator-name = "VCC_ARM"; + regulator-always-on; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + }; + DCDC4 { + regulator-name = "VCC_1V8"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + LDO1 { + regulator-name = "VCC_LDO1_2V5"; + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + LDO2 { + regulator-name = "VCC_LDO2_1V8"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + LDO3 { + regulator-name = "VCC_ETH_2V5"; + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + LDO4 { + regulator-name = "VCC_DDR4_2V5"; + regulator-always-on; + regulator-min-microvolt = <2500000>; + regulator-max-microvolt = <2500000>; + }; + LDO5 { + regulator-name = "VCC_LDO5_1V8"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + LDORTC1 { + regulator-name = "VCC_SNVS_1V8"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + LDORTC2 { + regulator-name = "VCC_SNVS_3V3"; + regulator-always-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + }; + }; + + sys_rtc: rtc@32 { + compatible = "ricoh,r2221tl"; + reg = <0x32>; + interrupt-parent = <&tca6424>; + interrupts = <6 IRQ_TYPE_EDGE_FALLING>; + }; + + tmp_sensor: temperature-sensor@71 { + compatible = "ti,tmp103"; + reg = <0x71>; + }; +}; + +&flexcan1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan1>; + xceiver-supply = <®_flexcan1_xceiver>; + status = "disabled"; +}; + +&flexcan2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexcan2>; + xceiver-supply = <®_flexcan2_xceiver>; + status = "disabled"; +}; + +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi0>; + status = "okay"; + + qspi_flash: flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + +&pwm1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm1>; + status = "disabled"; +}; + +&pwm2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm2>; + status = "disabled"; +}; + +&pwm3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm3>; + status = "disabled"; +}; + +&pwm4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pwm4>; + status = "disabled"; +}; + +&snvs_pwrkey { + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&uart2 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart2>; + uart-has-rtscts; + status = "okay"; +}; + +&uart3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart3>; + uart-has-rtscts; + status = "okay"; +}; + +&uart4 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart4>; + status = "disabled"; +}; + +&usb3_phy0 { + vbus-supply = <®_usb0_host_vbus>; + status = "okay"; +}; + +&usb3_phy1 { + vbus-supply = <®_usb1_host_vbus>; + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&usb_dwc3_0 { + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + extcon = <&extcon_usb0>; + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; + +&usdhc2 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC2>; + assigned-clock-rates = <400000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; + pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; + pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; + cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; + wp-gpios = <&gpio2 20 GPIO_ACTIVE_HIGH>; + bus-width = <4>; + vmmc-supply = <®_usdhc2_vmmc>; + status = "okay"; +}; + +&usdhc3 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; + assigned-clock-rates = <400000000>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_wdog>; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl_ecspi1: ecspi1grp { + fsl,pins = + , + , + , + , + ; + }; + + pinctrl_ecspi2: ecspi2grp { + fsl,pins = + , + , + , + , + ; + }; + + pinctrl_eqos: eqosgrp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_fec: fecgrp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_flexcan1: flexcan1grp { + fsl,pins = + , + ; + }; + + pinctrl_flexcan2: flexcan2grp { + fsl,pins = + , + ; + }; + + pinctrl_flexspi0: flexspi0grp { + fsl,pins = + , + , + , + , + , + , + ; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = + , + ; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = + , + ; + }; + + pinctrl_i2c3: i2c3grp { + fsl,pins = + , + ; + }; + + pinctrl_i2c4: i2c4grp { + fsl,pins = + , + ; + }; + + pinctrl_i2c5: i2c5grp { + fsl,pins = + , + ; + }; + + pinctrl_i2c6: i2c6grp { + fsl,pins = + , + ; + }; + + pinctrl_lcd0_backlight: lcd0-backlightgrp { + fsl,pins = + ; + }; + + pinctrl_lcd1_backlight: lcd1-backlightgrp { + fsl,pins = + ; + }; + + pinctrl_leds: ledsgrp { + fsl,pins = + ; + }; + + pinctrl_lvds_bridge: lvds-bridgegrp { + fsl,pins = + ; + }; + + pinctrl_pwm1: pwm1grp { + fsl,pins = + ; + }; + + pinctrl_pwm2: pwm2grp { + fsl,pins = + ; + }; + + pinctrl_pwm3: pwm3grp { + fsl,pins = + ; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = + ; + }; + + pinctrl_tca6424: tca6424grp { + fsl,pins = + ; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = + , + ; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = + , + , + , + ; + }; + + pinctrl_uart3: uart3grp { + fsl,pins = + , + , + , + ; + }; + + pinctrl_uart4: uart4grp { + fsl,pins = + , + ; + }; + + pinctrl_usb0_extcon: usb0-extcongrp { + fsl,pins = + ; + }; + + pinctrl_usb0_vbus: usb0-vbusgrp { + fsl,pins = + ; + }; + + pinctrl_usb1_vbus: usb1-vbusgrp { + fsl,pins = + ; + }; + + pinctrl_usdhc2_gpio: usdhc2-gpiogrp { + fsl,pins = + , + ; + }; + + pinctrl_usdhc2: usdhc2grp { + fsl,pins = + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc2_vmmc: usdhc2-vmmcgrp { + fsl,pins = + ; + }; + + pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { + fsl,pins = + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins = + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = + , + , + , + , + , + , + , + , + , + , + ; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = + ; + }; +};