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Mon, 15 Aug 2022 11:32:09 -0400 (EDT) From: Maxime Ripard To: Michael Turquette , Ray Jui , Broadcom internal kernel review list , Florian Fainelli , David Airlie , Daniel Vetter , Stephen Boyd , Scott Branden , Maxime Ripard , Emma Anholt Cc: Maxime Ripard , linux-arm-kernel@lists.infradead.org, linux-rpi-kernel@lists.infradead.org, dri-devel@lists.freedesktop.org, Dom Cobley , linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 7/7] drm/vc4: Make sure we don't end up with a core clock too high Date: Mon, 15 Aug 2022 17:31:29 +0200 Message-Id: <20220815-rpi-fix-4k-60-v1-7-c52bd642f7c6@cerno.tech> X-Mailer: git-send-email 2.37.1 In-Reply-To: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> References: <20220815-rpi-fix-4k-60-v1-0-c52bd642f7c6@cerno.tech> MIME-Version: 1.0 X-Mailer: b4 0.10.0-dev-a76f5 X-Developer-Signature: v=1; a=openpgp-sha256; l=2484; i=maxime@cerno.tech; h=from:subject:message-id; bh=5xL8zqAbx64ymg/R2TZazkdU4kRqZkVFXJuXP1IVv7A=; b=owGbwMvMwCX2+D1vfrpE4FHG02pJDEm/0k5YZt2yOnqh5LT2jrYtu/bzGz9g4Aq+HREa9zL+wjHv nWvsO0pZGMS4GGTFFFlihM2XxJ2a9bqTjW8ezBxWJpAhDFycAjCR5ixGhu2p88p/tNU+SEpdLytQWJ 6RpddvzDMjOW3znZtihvwzixgZTrJItM8969r9Q2jjhHlvv/Td2bTt4hPV9F9ZXMd7bqnE8QEA X-Developer-Key: i=maxime@cerno.tech; a=openpgp; fpr=BE5675C37E818C8B5764241C254BCFC56BF6CE8D X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220815_083212_820968_85544CA1 X-CRM114-Status: GOOD ( 10.71 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Following the clock rate range improvements to the clock framework, trying to set a disjoint range on a clock will now result in an error. Thus, we can't set a minimum rate higher than the maximum reported by the firmware, or clk_set_min_rate() will fail. Thus we need to clamp the rate we are about to ask for to the maximum rate possible on that clock. Signed-off-by: Maxime Ripard diff --git a/drivers/gpu/drm/vc4/vc4_kms.c b/drivers/gpu/drm/vc4/vc4_kms.c index b45dcdfd7306..4794e7235bb0 100644 --- a/drivers/gpu/drm/vc4/vc4_kms.c +++ b/drivers/gpu/drm/vc4/vc4_kms.c @@ -22,6 +22,8 @@ #include #include +#include + #include "vc4_drv.h" #include "vc4_regs.h" @@ -354,6 +356,7 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) struct vc4_hvs_state *new_hvs_state; struct drm_crtc *crtc; struct vc4_hvs_state *old_hvs_state; + unsigned long max_clock_rate; unsigned int channel; int i; @@ -394,11 +397,12 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) old_hvs_state->fifo_state[channel].pending_commit = NULL; } + max_clock_rate = rpi_firmware_clk_get_max_rate(hvs->core_clk); if (vc4->is_vc5) { unsigned long state_rate = max(old_hvs_state->core_clock_rate, new_hvs_state->core_clock_rate); - unsigned long core_rate = max_t(unsigned long, - 500000000, state_rate); + unsigned long core_rate = clamp_t(unsigned long, state_rate, + 500000000, max_clock_rate); drm_dbg(dev, "Raising the core clock at %lu Hz\n", core_rate); @@ -432,14 +436,17 @@ static void vc4_atomic_commit_tail(struct drm_atomic_state *state) drm_atomic_helper_cleanup_planes(dev, state); if (vc4->is_vc5) { - drm_dbg(dev, "Running the core clock at %lu Hz\n", - new_hvs_state->core_clock_rate); + unsigned long core_rate = min_t(unsigned long, + max_clock_rate, + new_hvs_state->core_clock_rate); + + drm_dbg(dev, "Running the core clock at %lu Hz\n", core_rate); /* * Request a clock rate based on the current HVS * requirements. */ - WARN_ON(clk_set_min_rate(hvs->core_clk, new_hvs_state->core_clock_rate)); + WARN_ON(clk_set_min_rate(hvs->core_clk, core_rate)); drm_dbg(dev, "Core clock actual rate: %lu Hz\n", clk_get_rate(hvs->core_clk));