From patchwork Tue Aug 23 12:21:11 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 12952030 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 40934C32772 for ; Tue, 23 Aug 2022 12:27:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=uZTyfqd+BnD5nYChY+jWl4UgVetBgko8DoGhmCZwRVo=; b=b1p9mMfB0nh3I2 cs35FJpf06EOxCMvFvFu0JlUz0q6WvPBEjQnC6PB9NmQgHFY5wHIY+GIzoWZLsihX09veD19/6JJH UpJQ21BqyWFTcGv+TEl+C7q/2QzmpUaSOXl8aeDo9nkc3MMl8L53eNeaahfa88iyYRrii6UZJ7FqH Pq9mH7lPLwzqp2MxfU9URKxjZ+xo7oU2Oikpzb3Cgyoegqh1l6+ngaRAGnaF4tzdYkAvrI/9xabx6 JMKtbAAfcOuahVUhk3q9NXhqyP5wNZ/XshkDEtvq/04oMedd5OWm1di5ZU1IQbChnLBtwRCDhalvd CM7WOl4LqxIJDxeRv6/A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oQSyh-005qbG-A3; Tue, 23 Aug 2022 12:25:55 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oQSuG-005oIt-9p for linux-arm-kernel@lists.infradead.org; Tue, 23 Aug 2022 12:21:21 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 023FFB81B1F; Tue, 23 Aug 2022 12:21:19 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 40CEAC433D6; Tue, 23 Aug 2022 12:21:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1661257277; bh=y3VXHAmGjZqM5Vy6gwwqAEc+bzruPWO0TMWQn3yYkW4=; h=From:To:Cc:Subject:Date:From; b=Rf2B+4eipwa7ijSUKqXAUKsJtqk4ZR1Rg/IgUq/qkADrfZcg/f0qg+MAQaGUPpMpD +liW9gnQq2N+qiDQWYmEwTWQjjsjSF1Cy5yVYCXa/n75q+O+/s/t3++MLhNTTCCXoz PTWjKO8BrRgUQcMfiOtnjxUKG/7pMaCphPuc1Q/24iyWoOfKwPlH1oJPvDZbJ5zQiC wsJu28E8RVVmIAFoNIaqVVFXlNCRFDB5tVuacRQuKsCvmhBOCT8hLJovgNgNblNZd2 xx83HmfXS9AniW9lDg3b+iOCLad3LxQSDcTanTe0eLTynKplWJ5+KogwRK39mhMG9n KocTVnmSpZnOQ== From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: Will Deacon , Catalin Marinas , Mark Rutland , Robin Murphy , Christoph Hellwig , Ard Biesheuvel Subject: [PATCH] arm64: dma: Drop cache invalidation from arch_dma_prep_coherent() Date: Tue, 23 Aug 2022 13:21:11 +0100 Message-Id: <20220823122111.17439-1-will@kernel.org> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220823_052120_537252_365AB314 X-CRM114-Status: GOOD ( 17.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org arch_dma_prep_coherent() is called when preparing a non-cacheable region for a consistent DMA buffer allocation. Since the buffer pages may previously have been written via a cacheable mapping and consequently allocated as dirty cachelines, the purpose of this function is to remove these dirty lines from the cache, writing them back so that the non-coherent device is able to see them. On arm64, this operation can be achieved with a clean to the point of coherency; a subsequent invalidation is not required and serves little purpose in the presence of a cacheable alias (e.g. the linear map), since clean lines can be speculatively fetched back into the cache after the invalidation operation has completed. Relax the cache maintenance in arch_dma_prep_coherent() so that only a clean, and not a clean-and-invalidate operation is performed. Cc: Catalin Marinas Cc: Mark Rutland Cc: Robin Murphy Cc: Christoph Hellwig Cc: Ard Biesheuvel Signed-off-by: Will Deacon Reviewed-by: Catalin Marinas --- I'm slightly wary about this change as other architectures seem to do clean+invalidate here, but I'd like to hear what others think in any case. arch/arm64/mm/dma-mapping.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 599cf81f5685..83a512a6ff0d 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -36,7 +36,7 @@ void arch_dma_prep_coherent(struct page *page, size_t size) { unsigned long start = (unsigned long)page_address(page); - dcache_clean_inval_poc(start, start + size); + dcache_clean_poc(start, start + size); } #ifdef CONFIG_IOMMU_DMA