Message ID | 20220826192252.794651-3-marcel@ziswiler.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ARM: arm64: dts/clk: imx: indentation permission whitespace cleanup 2 | expand |
On Fri, Aug 26, 2022 at 09:22:49PM +0200, Marcel Ziswiler wrote: > From: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > This fixes the following warning: > > arch/arm/boot/dts/imx6sx-udoo-neo.dtsi:309: check: Please don't use multiple > blank lines It includes changes more than multiple blank lines fix. I mentioned those indent changes a bit in the commit log. > > Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Applied, thanks! Shawn > --- > > arch/arm/boot/dts/imx6sx-udoo-neo.dtsi | 14 ++++++-------- > 1 file changed, 6 insertions(+), 8 deletions(-) > > diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi > index 35861bbea94e..c84ea1fac5e9 100644 > --- a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi > +++ b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi > @@ -226,7 +226,7 @@ lcdc: endpoint { > &iomuxc { > pinctrl_bt_reg: btreggrp { > fsl,pins = > - <MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x15059>; > + <MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x15059>; > }; > > pinctrl_enet1: enet1grp { > @@ -306,7 +306,6 @@ MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 > >; > }; > > - > pinctrl_uart1: uart1grp { > fsl,pins = > <MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1>, > @@ -347,24 +346,23 @@ pinctrl_uart6: uart6grp { > > pinctrl_otg1_reg: otg1grp { > fsl,pins = > - <MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0>; > + <MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0>; > }; > > - > pinctrl_otg2_reg: otg2grp { > fsl,pins = > - <MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x10b0>; > + <MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x10b0>; > }; > > pinctrl_usb_otg1: usbotg1grp { > fsl,pins = > - <MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059>, > - <MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x10b0>; > + <MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059>, > + <MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x10b0>; > }; > > pinctrl_usb_otg2: usbot2ggrp { > fsl,pins = > - <MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC 0x10b0>; > + <MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC 0x10b0>; > }; > > pinctrl_usdhc2: usdhc2grp { > -- > 2.36.1 >
diff --git a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi index 35861bbea94e..c84ea1fac5e9 100644 --- a/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi +++ b/arch/arm/boot/dts/imx6sx-udoo-neo.dtsi @@ -226,7 +226,7 @@ lcdc: endpoint { &iomuxc { pinctrl_bt_reg: btreggrp { fsl,pins = - <MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x15059>; + <MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x15059>; }; pinctrl_enet1: enet1grp { @@ -306,7 +306,6 @@ MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0 >; }; - pinctrl_uart1: uart1grp { fsl,pins = <MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1>, @@ -347,24 +346,23 @@ pinctrl_uart6: uart6grp { pinctrl_otg1_reg: otg1grp { fsl,pins = - <MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0>; + <MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0>; }; - pinctrl_otg2_reg: otg2grp { fsl,pins = - <MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x10b0>; + <MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x10b0>; }; pinctrl_usb_otg1: usbotg1grp { fsl,pins = - <MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059>, - <MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x10b0>; + <MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059>, + <MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x10b0>; }; pinctrl_usb_otg2: usbot2ggrp { fsl,pins = - <MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC 0x10b0>; + <MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC 0x10b0>; }; pinctrl_usdhc2: usdhc2grp {