From patchwork Fri Sep 16 14:25:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Janne Grunau X-Patchwork-Id: 12978600 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 68A42C54EE9 for ; Fri, 16 Sep 2022 14:28:32 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lzV5cEH8f+xqfOX1Dz2rKhMHS0dbAgem5u+QRPJTnLI=; b=nQHbHE9YMKZRxW l6ebBO1Qiochk35sgXjfQ7ahzNtI3szYOcTsZcE2E6tOONywh9/3ETphxardwMNXq/Z7f7oBR3Grh 2g7rhOuGSSJ9z6cqqkKmc1dREZfl8UEmeIjakbdlIUSRFEVY0Idx6im1VS3mhMwoSJTb/Q00lntNK rWrfooQH81yssvWdcOVGhRxrv83Nv5r40OKW59agKes1B8ev1LN4GkiWF8Z0xc6iKmQT0Ebtcb5yQ opf62tZA+mxAuA5jIq/B1ZxAuDugmahv1II2u0lprrHlL8HZuMLEcf3YDLBq+Uls+hg7R/4KHiHg6 iBldniEJGiZT1kAOxKeg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oZCJT-00E90v-4c; Fri, 16 Sep 2022 14:27:27 +0000 Received: from soltyk.jannau.net ([144.76.91.90]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oZCHz-00E8Hr-O7 for linux-arm-kernel@lists.infradead.org; Fri, 16 Sep 2022 14:26:00 +0000 Received: from robin.home.jannau.net (unknown [91.200.110.112]) by soltyk.jannau.net (Postfix) with ESMTPSA id 8485A26F07A; Fri, 16 Sep 2022 16:25:52 +0200 (CEST) From: Janne Grunau To: asahi@lists.linux.dev Cc: Mark Kettenis , Krzysztof Kozlowski , Marc Zyngier , Alyssa Rosenzweig , Hector Martin , Krzysztof Kozlowski , Rob Herring , Sven Peter , Thomas Gleixner , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v1 02/10] dt-bindings: apple,aic2: Add CPU PMU per-cpu pseudo-interrupts Date: Fri, 16 Sep 2022 16:25:42 +0200 Message-Id: <20220916142550.269905-3-j@jannau.net> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220916142550.269905-1-j@jannau.net> References: <20220916142550.269905-1-j@jannau.net> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220916_072556_043812_E3116372 X-CRM114-Status: GOOD ( 10.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Advertise the two pseudo-interrupts that tied to the two PMU flavours present in the Apple M1 Pro/Max/Ultra SoC. We choose the expose two different pseudo-interrupts to the OS as the e-core PMU is obviously different from the p-core one, effectively presenting two different devices. Imported from "apple,aic". Signed-off-by: Janne Grunau Acked-by: Krzysztof Kozlowski Acked-by: Marc Zyngier Reviewed-by: Rob Herring --- Changes in v1: - Added Krzysztof's and Marc's ack --- .../interrupt-controller/apple,aic2.yaml | 29 +++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml index 47a78a167aba..06948c0e36a5 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/apple,aic2.yaml @@ -69,6 +69,35 @@ properties: power-domains: maxItems: 1 + affinities: + type: object + additionalProperties: false + description: + FIQ affinity can be expressed as a single "affinities" node, + containing a set of sub-nodes, one per FIQ with a non-default + affinity. + patternProperties: + "^.+-affinity$": + type: object + additionalProperties: false + properties: + apple,fiq-index: + description: + The interrupt number specified as a FIQ, and for which + the affinity is not the default. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 5 + + cpus: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Should be a list of phandles to CPU nodes (as described in + Documentation/devicetree/bindings/arm/cpus.yaml). + + required: + - apple,fiq-index + - cpus + required: - compatible - '#interrupt-cells'