From patchwork Wed Sep 28 09:17:20 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q2h1bmZlbmcgWXVuICjkupHmmKXls7Ap?= X-Patchwork-Id: 12992055 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 924B4C04A95 for ; Wed, 28 Sep 2022 10:19:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=JgXXFO7hfCluZO5XJxvXbhZnuKTcS6dLQDZDcy51o0c=; b=O8kQhv15w5mhiI GsRdCSE1uX7alj/3TI/yuXOQpIuzQbAbPcM/Q3xrvHklRJf5Salagy13PCpO4R5yEJszr9LV9WIcJ 2CetTga1ZVeyQ2gUAKTTtDsH24su1XFt3iCIOen3J9Jk/Qgvb+Eb/TSQ64ftJGVbu3WFvSs8PPx/e EX1Dxjt4Emw8dH10I3EnLIWty5m0bOP5R9ENdIFE+kZk6sxjG+QoDpX6di9k+8SOpIcWC2bNOuJvC HdimTRtNQOQAuR77POp3AlM/kwgiLyxtWskL+FfcftsQ8/YQIBg3PAkF44MDwnpNuIE1DjJoKUOTR AX+vkuZKhSTerZS/LIlQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1odU8o-00FXyO-Um; Wed, 28 Sep 2022 10:18:11 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1odU8k-00FXxW-Ce; Wed, 28 Sep 2022 10:18:07 +0000 X-UUID: 1a948ee480a54e15a52f0ec97d177feb-20220928 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=XXqYom0PShqqvqx1Lq9wqOLByxK/9HTGJNY8mFnsriY=; b=EJRiYPDe0203cIf33SGVWKn4006aT7zvRZqCJMOpJiqS/biujUFomlXkaYldZLrreIZPJOrDJoKntq7gt4x6eaDcrDsaVUritkpgVMlq5ZSgnpxevV5glF7nuPFFTiPTaRLAEdDXHWTXrJg6MCCKFwvC0tdv/s4S029omOZC5os=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.11,REQID:6c4c68bf-f2c4-45ed-9dcd-a09202577c75,IP:0,U RL:0,TC:0,Content:-25,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTIO N:release,TS:-25 X-CID-META: VersionHash:39a5ff1,CLOUDID:cd5e5da3-dc04-435c-b19b-71e131a5fc35,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:102,TC:nil,Content:0,EDM:-3,IP:nil,U RL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,COL:0 X-UUID: 1a948ee480a54e15a52f0ec97d177feb-20220928 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 814724454; Wed, 28 Sep 2022 03:18:03 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs11n2.mediatek.inc (172.21.101.187) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Wed, 28 Sep 2022 17:17:27 +0800 Received: from localhost.localdomain (10.17.3.154) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Wed, 28 Sep 2022 17:17:26 +0800 From: Chunfeng Yun To: Greg Kroah-Hartman CC: Chunfeng Yun , Matthias Brugger , , , , , Eddie Hung , Min Guo , Tianping Fang , Subject: [PATCH 1/2] usb: mtu3: fix ep0's stall of out data stage Date: Wed, 28 Sep 2022 17:17:20 +0800 Message-ID: <20220928091721.26112-1-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220928_031806_455445_745876A5 X-CRM114-Status: GOOD ( 17.55 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org It happens when enable uvc function, the flow as below: the controller switch to data stage, then call -> foward_to_driver() -> composite_setup() -> uvc_function_setup(), it send out an event to user layer to notify it call -> ioctl() -> uvc_send_response() -> usb_ep_queue(), but before the user call ioctl to queue ep0's buffer, the host already send out data, but the controller find that no buffer is queued to receive data, it send out STALL handshake. To fix the issue, don't send out ACK of setup stage to switch to out data stage until the buffer is available. Cc: Reported-by: Min Guo Signed-off-by: Chunfeng Yun --- drivers/usb/mtu3/mtu3.h | 4 ++++ drivers/usb/mtu3/mtu3_gadget_ep0.c | 22 +++++++++++++++++++--- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/drivers/usb/mtu3/mtu3.h b/drivers/usb/mtu3/mtu3.h index 2d7b57e07eee..6b64ad17724d 100644 --- a/drivers/usb/mtu3/mtu3.h +++ b/drivers/usb/mtu3/mtu3.h @@ -318,6 +318,9 @@ static inline struct ssusb_mtk *dev_to_ssusb(struct device *dev) * for GET_STATUS and SET_SEL * @setup_buf: ep0 response buffer for GET_STATUS and SET_SEL requests * @u3_capable: is capable of supporting USB3 + * @delayed_setup: delay the setup stage to avoid STALL handshake in + * out data stage due to the class driver doesn't queue buffer + * before the host send out data */ struct mtu3 { spinlock_t lock; @@ -360,6 +363,7 @@ struct mtu3 { unsigned connected:1; unsigned async_callbacks:1; unsigned separate_fifo:1; + unsigned delayed_setup:1; u8 address; u8 test_mode_nr; diff --git a/drivers/usb/mtu3/mtu3_gadget_ep0.c b/drivers/usb/mtu3/mtu3_gadget_ep0.c index e4fd1bb14a55..f7a71cc83e15 100644 --- a/drivers/usb/mtu3/mtu3_gadget_ep0.c +++ b/drivers/usb/mtu3/mtu3_gadget_ep0.c @@ -162,6 +162,19 @@ static void ep0_do_status_stage(struct mtu3 *mtu) mtu3_writel(mbase, U3D_EP0CSR, value | EP0_SETUPPKTRDY | EP0_DATAEND); } +/* delay sending out ACK of setup stage to wait for OUT buffer queued */ +static void ep0_setup_stage_send_ack(struct mtu3 *mtu) +{ + void __iomem *mbase = mtu->mac_base; + u32 value; + + if (mtu->delayed_setup) { + value = mtu3_readl(mbase, U3D_EP0CSR) & EP0_W1C_BITS; + mtu3_writel(mbase, U3D_EP0CSR, value | EP0_SETUPPKTRDY); + mtu->delayed_setup = 0; + } +} + static int ep0_queue(struct mtu3_ep *mep0, struct mtu3_request *mreq); static void ep0_dummy_complete(struct usb_ep *ep, struct usb_request *req) @@ -628,8 +641,9 @@ static void ep0_read_setup(struct mtu3 *mtu, struct usb_ctrlrequest *setup) csr | EP0_SETUPPKTRDY | EP0_DPHTX); mtu->ep0_state = MU3D_EP0_STATE_TX; } else { - mtu3_writel(mtu->mac_base, U3D_EP0CSR, - (csr | EP0_SETUPPKTRDY) & (~EP0_DPHTX)); + mtu3_writel(mtu->mac_base, U3D_EP0CSR, csr & ~EP0_DPHTX); + /* send ACK when the buffer is queued */ + mtu->delayed_setup = 1; mtu->ep0_state = MU3D_EP0_STATE_RX; } } @@ -804,9 +818,11 @@ static int ep0_queue(struct mtu3_ep *mep, struct mtu3_request *mreq) switch (mtu->ep0_state) { case MU3D_EP0_STATE_SETUP: - case MU3D_EP0_STATE_RX: /* control-OUT data */ case MU3D_EP0_STATE_TX: /* control-IN data */ break; + case MU3D_EP0_STATE_RX: /* control-OUT data */ + ep0_setup_stage_send_ack(mtu); + break; default: dev_err(mtu->dev, "%s, error in ep0 state %s\n", __func__, decode_ep0_state(mtu));