From patchwork Thu Sep 29 23:35:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Serge Semin X-Patchwork-Id: 12994774 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ABEC5C433FE for ; Thu, 29 Sep 2022 23:51:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; 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s=post; bh=YDzYuOyuDWeLpM4botukPDxFRqBQd1koKC81hFPdd2Q=; b=fxhBJcJS0XdK wzUpSA/CLfYsVvdrEqKui019XvcrQw+EtHUpcOa3xiGkwIUgpWAG5uar3NTTDoit 6uLPEsP/9ccfbQ2G6+KEOI8SVfH6jCEM7MDKvX3bYRoFRMeojJqWTRF7QW+zPSAq xzv5Roig5u+tp0nEiM1aJjnzP2LSTSM= Received: from mail.baikal.int (mail.baikal.int [192.168.51.25]) by post.baikalelectronics.com (Proxmox) with ESMTP id AD9EFE0E70; Fri, 30 Sep 2022 02:36:40 +0300 (MSK) Received: from localhost (192.168.168.10) by mail (192.168.51.25) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 30 Sep 2022 02:36:41 +0300 From: Serge Semin To: Michal Simek , Borislav Petkov , Mauro Carvalho Chehab , Tony Luck , James Morse , Robert Richter CC: Serge Semin , Serge Semin , Alexey Malahov , Michail Ivanov , Pavel Parkhomenko , Punnaiah Choudary Kalluri , Manish Narani , Dinh Nguyen , , , Subject: [PATCH RESEND v3 14/18] EDAC/synopsys: Simplify HIF/SDRAM column mapping get procedure Date: Fri, 30 Sep 2022 02:35:26 +0300 Message-ID: <20220929233530.13016-15-Sergey.Semin@baikalelectronics.ru> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220929233530.13016-1-Sergey.Semin@baikalelectronics.ru> References: <20220929233530.13016-1-Sergey.Semin@baikalelectronics.ru> MIME-Version: 1.0 X-Originating-IP: [192.168.168.10] X-ClientProxiedBy: MAIL.baikal.int (192.168.51.25) To mail (192.168.51.25) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220930_003642_682879_3F3C37F4 X-CRM114-Status: GOOD ( 18.15 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org What is currently implemented in the driver by means of the multiple if-else-if-else statements in fact is described in the hardware reference manual [1]. It says: 1. All of the column bits shift up 1 bit when only half of the data bus is in use. In this case, for instance, you need to look at ADDRMAP3.addrmap_col_b6 instead to determine the value of column address bit 7. 2. All of the column bits shift up 2 bits when only a quarter of the data bus is in use. In this case, for instance, you need to look at ADDRMAP2.addrmap_col_b5 instead to determine the value of column address bit 7. 3. In addition to the above, the column bit 10 is reserved for the auto-precharge command in DDR2/3/4/mDDR. So the column bits must be further shifted up 1 bit when one of these DDR protocols is enabled. So taking into account all of the notes above and what the column bit 12 is always reserved, the SDRAM column bits mapping procedure can be significantly simplified. Initially we get to read the mapping as if for the LPDDR2/3/4 memory with Full DQ-bus utilized. Then we shift the column bits up in accordance with the detected DQ-bus width mode. That's it. Simple, canonical and scalable. Signed-off-by: Serge Semin --- drivers/edac/synopsys_edac.c | 83 ++++++++++++------------------------ 1 file changed, 27 insertions(+), 56 deletions(-) diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 9baa62f6d22b..9c4f7d60b820 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -990,8 +990,22 @@ static void snps_get_hif_col_map(struct snps_edac_priv *priv, u32 *addrmap) map->col[9] = map->col[9] == DDR_ADDRMAP_MAX_15 ? DDR_ADDRMAP_UNUSED : map->col[9] + COL_B9_BASE; + map->col[10] = FIELD_GET(DDR_ADDRMAP_B0_M15, addrmap[4]); + map->col[10] = map->col[10] == DDR_ADDRMAP_MAX_15 ? + DDR_ADDRMAP_UNUSED : map->col[10] + COL_B10_BASE; + + map->col[11] = FIELD_GET(DDR_ADDRMAP_B8_M15, addrmap[4]); + map->col[11] = map->col[11] == DDR_ADDRMAP_MAX_15 ? + DDR_ADDRMAP_UNUSED : map->col[11] + COL_B11_BASE; + + /* + * In case of the non-Full DQ bus mode the lowest columns are + * unmapped and used by the controller to read the full DQ word + * in multiple cycles (col[0] for the Half bus mode, col[0:1] for + * the Quarter bus mode). + */ if (priv->info.dq_mode) { - for (i = 9; i > priv->info.dq_mode; i--) { + for (i = 11 + priv->info.dq_mode; i >= priv->info.dq_mode; i--) { map->col[i] = map->col[i - priv->info.dq_mode]; map->col[i - priv->info.dq_mode] = DDR_ADDRMAP_UNUSED; } @@ -1001,65 +1015,22 @@ static void snps_get_hif_col_map(struct snps_edac_priv *priv, u32 *addrmap) * Per JEDEC DDR2/3/4/mDDR specification, column address bit 10 is * reserved for indicating auto-precharge, and hence no source * address bit can be mapped to col[10]. + */ + if (priv->info.sdram_mode == MEM_LPDDR || priv->info.sdram_mode == MEM_DDR2 || + priv->info.sdram_mode == MEM_DDR3 || priv->info.sdram_mode == MEM_DDR4) { + for (i = 12 + priv->info.dq_mode; i > 10; i--) { + map->col[i] = map->col[i - 1]; + map->col[i - 1] = DDR_ADDRMAP_UNUSED; + } + } + + /* * Per JEDEC specification, column address bit 12 is reserved * for the Burst-chop status, so no source address bit mapping * for col[12] either. */ - if (priv->info.dq_mode == SNPS_DQ_FULL) { - if (priv->info.sdram_mode == MEM_LPDDR3) { - map->col[10] = FIELD_GET(DDR_ADDRMAP_B0_M15, addrmap[4]); - map->col[10] = map->col[10] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[10] + COL_B10_BASE; - - map->col[11] = FIELD_GET(DDR_ADDRMAP_B8_M15, addrmap[4]); - map->col[11] = map->col[11] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[11] + COL_B11_BASE; - } else { - map->col[11] = FIELD_GET(DDR_ADDRMAP_B0_M15, addrmap[4]); - map->col[11] = map->col[11] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[11] + COL_B10_BASE; - - map->col[13] = FIELD_GET(DDR_ADDRMAP_B8_M15, addrmap[4]); - map->col[13] = map->col[13] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[13] + COL_B11_BASE; - } - } else if (priv->info.dq_mode == SNPS_DQ_HALF) { - if (priv->info.sdram_mode == MEM_LPDDR3) { - map->col[10] = FIELD_GET(DDR_ADDRMAP_B24_M15, addrmap[3]); - map->col[10] = map->col[10] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[10] + COL_B9_BASE; - - map->col[11] = FIELD_GET(DDR_ADDRMAP_B0_M15, addrmap[4]); - map->col[11] = map->col[11] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[11] + COL_B10_BASE; - } else { - map->col[11] = FIELD_GET(DDR_ADDRMAP_B24_M15, addrmap[3]); - map->col[11] = map->col[11] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[11] + COL_B9_BASE; - - map->col[13] = FIELD_GET(DDR_ADDRMAP_B0_M15, addrmap[4]); - map->col[13] = map->col[13] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[13] + COL_B10_BASE; - } - } else { - if (priv->info.sdram_mode == MEM_LPDDR3) { - map->col[10] = FIELD_GET(DDR_ADDRMAP_B16_M15, addrmap[3]); - map->col[10] = map->col[10] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[10] + COL_B8_BASE; - - map->col[11] = FIELD_GET(DDR_ADDRMAP_B24_M15, addrmap[3]); - map->col[11] = map->col[11] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[11] + COL_B9_BASE; - } else { - map->col[11] = FIELD_GET(DDR_ADDRMAP_B16_M15, addrmap[3]); - map->col[11] = map->col[11] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[11] + COL_B8_BASE; - - map->col[11] = FIELD_GET(DDR_ADDRMAP_B24_M15, addrmap[3]); - map->col[13] = map->col[13] == DDR_ADDRMAP_MAX_15 ? - DDR_ADDRMAP_UNUSED : map->col[13] + COL_B9_BASE; - } - } + map->col[13] = map->col[12]; + map->col[12] = DDR_ADDRMAP_UNUSED; } /**