From patchwork Thu Oct 6 15:25:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chukun Pan X-Patchwork-Id: 13000493 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 82782C4332F for ; Thu, 6 Oct 2022 15:27:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Pu4W7PRx50nYylgyFMZqwbbNSGob768HHyoevjFRfRQ=; b=fJaIyg4NFOTb++ QezS2qKuKU6oRRkGqlNY1UX6HW4O0gRgtOAmNfZg/EZx8MWwR3ZtpZyJ9IErAdGcQ9Blbw8vxxmPz evz5xFeqGz0nlY+jSG2OSWVGcuQNOt3PM9xRax5MryHNwbXpoy1V2VuQMrvC49JUjjz0Wm/ROSAvY BKPnbfb8urSOaNtDorMaIwN5jLjWrxxBKaFJ8V+FgzjCcYNeUyFyQ4rW4L+Rmnpp8QA7iQi4pwC5T jJKetVrx4xMcIvKI+Qko3jbEH7fhktJTYXJ5ZCyKqSODpZistf0Uj0mrkqntR2Hj9l8aDtNwiKPz/ 4QUbgwaHfpCZKl9YtQQw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ogSlk-003NBQ-0A; Thu, 06 Oct 2022 15:26:40 +0000 Received: from mail-m121145.qiye.163.com ([115.236.121.145]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ogSl1-003Mne-UW; Thu, 06 Oct 2022 15:25:58 +0000 Received: from amadeus-VLT-WX0.lan (unknown [120.37.187.24]) by mail-m121145.qiye.163.com (Hmail) with ESMTPA id 90F188000CB; Thu, 6 Oct 2022 23:25:46 +0800 (CST) From: Chukun Pan To: Heiko Stuebner Cc: Michael Riesch , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Chukun Pan , Anand Moon Subject: [PATCH v2 2/2] arm64: dts: rockchip: Add PCIe v3 nodes to rock-3a Date: Thu, 6 Oct 2022 23:25:24 +0800 Message-Id: <20221006152524.502445-3-amadeus@jmu.edu.cn> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20221006152524.502445-1-amadeus@jmu.edu.cn> References: <20221006152524.502445-1-amadeus@jmu.edu.cn> MIME-Version: 1.0 X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkZThlPVklMTk8fGEtDSUMeSFUTARMWGhIXJBQOD1 lXWRgSC1lBWUpJS1VITFVKQ0xVSU9ZV1kWGg8SFR0UWUFZT0tIVUpKS0hKQ1VKS0tVS1kG X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6PDo6Ixw5Mz0pPk8MCwwBViJL IQ0KCi5VSlVKTU1OS01CQk9MSUtMVTMWGhIXVRoWGh8eDgg7ERYOVR4fDlUYFUVZV1kSC1lBWUpJ S1VITFVKQ0xVSU9ZV1kIAVlBSE5LSDcG X-HM-Tid: 0a83ade717beb03akuuu90f188000cb X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221006_082556_191064_8E8D3D97 X-CRM114-Status: UNSURE ( 8.09 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add Nodes to Radxa ROCK3 Model A board to support PCIe v3. Tested-by: Anand Moon Signed-off-by: Chukun Pan --- .../boot/dts/rockchip/rk3568-rock-3a.dts | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts index 8adf672709e8..c1fa917083ba 100644 --- a/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts @@ -67,6 +67,37 @@ vcc12v_dcin: vcc12v-dcin-regulator { regulator-boot-on; }; + pcie30_avdd0v9: pcie30-avdd0v9-regulator { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + vin-supply = <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: pcie30-avdd1v8-regulator { + compatible = "regulator-fixed"; + regulator-name = "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + vin-supply = <&vcc3v3_sys>; + }; + + /* pi6c pcie clock generator */ + vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_pi6c_03"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc5v0_sys>; + }; + vcc3v3_pcie: vcc3v3-pcie-regulator { compatible = "regulator-fixed"; enable-active-high; @@ -546,6 +577,19 @@ &pcie2x1 { status = "okay"; }; +&pcie30phy { + phy-supply = <&vcc3v3_pi6c_03>; + status = "okay"; +}; + +&pcie3x2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie30x2m1_pins>; + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie>; + status = "okay"; +}; + &pinctrl { cam { vcc_cam_en: vcc_cam_en {