Message ID | 20221011184211.18128-5-jim2101024@gmail.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | PCI: brcmstb: Add Multi-MSI and some improvements | expand |
If you have occasion to revise this series, update the subject to be a sentence like the others, e.g., something like PCI: brcmstb: Drop needless 'inline' annotations On Tue, Oct 11, 2022 at 02:42:09PM -0400, Jim Quinlan wrote: > A number of inline functions are called rarely and/or are not > time-critical. Take out the "inline" and let the compiler do its work. > > Signed-off-by: Jim Quinlan <jim2101024@gmail.com> > Acked-by: Florian Fainelli <f.fainelli@gmail.com> Thanks, looks good to me! Reviewed-by: Bjorn Helgaas <bhelgaas@google.com> > --- > drivers/pci/controller/pcie-brcmstb.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c > index c7210cec1f58..e3045f1eadbc 100644 > --- a/drivers/pci/controller/pcie-brcmstb.c > +++ b/drivers/pci/controller/pcie-brcmstb.c > @@ -723,7 +723,7 @@ static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus, > return base + DATA_ADDR(pcie); > } > > -static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) > +static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) > { > u32 tmp, mask = RGR1_SW_INIT_1_INIT_GENERIC_MASK; > u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT; > @@ -733,7 +733,7 @@ static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, > writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); > } > > -static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val) > +static void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val) > { > u32 tmp, mask = RGR1_SW_INIT_1_INIT_7278_MASK; > u32 shift = RGR1_SW_INIT_1_INIT_7278_SHIFT; > @@ -743,7 +743,7 @@ static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 > writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); > } > > -static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) > +static void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) > { > if (WARN_ONCE(!pcie->perst_reset, "missing PERST# reset controller\n")) > return; > @@ -754,7 +754,7 @@ static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) > reset_control_deassert(pcie->perst_reset); > } > > -static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) > +static void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) > { > u32 tmp; > > @@ -764,7 +764,7 @@ static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) > writel(tmp, pcie->base + PCIE_MISC_PCIE_CTRL); > } > > -static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val) > +static void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val) > { > u32 tmp; > > @@ -773,7 +773,7 @@ static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val) > writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); > } > > -static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, > +static int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, > u64 *rc_bar2_size, > u64 *rc_bar2_offset) > { > -- > 2.17.1 >
diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index c7210cec1f58..e3045f1eadbc 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -723,7 +723,7 @@ static void __iomem *brcm7425_pcie_map_bus(struct pci_bus *bus, return base + DATA_ADDR(pcie); } -static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) +static void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, u32 val) { u32 tmp, mask = RGR1_SW_INIT_1_INIT_GENERIC_MASK; u32 shift = RGR1_SW_INIT_1_INIT_GENERIC_SHIFT; @@ -733,7 +733,7 @@ static inline void brcm_pcie_bridge_sw_init_set_generic(struct brcm_pcie *pcie, writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); } -static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val) +static void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 val) { u32 tmp, mask = RGR1_SW_INIT_1_INIT_7278_MASK; u32 shift = RGR1_SW_INIT_1_INIT_7278_SHIFT; @@ -743,7 +743,7 @@ static inline void brcm_pcie_bridge_sw_init_set_7278(struct brcm_pcie *pcie, u32 writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); } -static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) +static void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) { if (WARN_ONCE(!pcie->perst_reset, "missing PERST# reset controller\n")) return; @@ -754,7 +754,7 @@ static inline void brcm_pcie_perst_set_4908(struct brcm_pcie *pcie, u32 val) reset_control_deassert(pcie->perst_reset); } -static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) +static void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) { u32 tmp; @@ -764,7 +764,7 @@ static inline void brcm_pcie_perst_set_7278(struct brcm_pcie *pcie, u32 val) writel(tmp, pcie->base + PCIE_MISC_PCIE_CTRL); } -static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val) +static void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val) { u32 tmp; @@ -773,7 +773,7 @@ static inline void brcm_pcie_perst_set_generic(struct brcm_pcie *pcie, u32 val) writel(tmp, pcie->base + PCIE_RGR1_SW_INIT_1(pcie)); } -static inline int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, +static int brcm_pcie_get_rc_bar2_size_and_offset(struct brcm_pcie *pcie, u64 *rc_bar2_size, u64 *rc_bar2_offset) {