From patchwork Tue Oct 18 21:15:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Davis X-Patchwork-Id: 13011060 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3B43C433FE for ; Tue, 18 Oct 2022 21:18:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=oww/VAb6Rlkajk3GvjQIjS4vK37zmM03QJZCMTDyi1Q=; b=bxvAweDZCQNnj3 yEOqwceh1E5Fr2zyFQFhPop1fVRyNoF+kukZgvPFjFEf0ID9de9h9d5oKq9aeYLAAOAnlYmvFJmas 40xkjbSVkpSpPH+Ah0/YrlUHKkdS642Ye5JzhdFwQHlFBGXKQHPowdlYIqQm5MDRXimE6gH1wV+eM 1O4BygBqU1wfw7ir6t4VRnyEZ5FH9Kuwl2LTrApXnkAO/7FAt2P3VCmALdSDm49exWkuzUq20lXZb MPOB6UD9+uKMvJlzTSB71MHLGLUUDsV6BKjCBXwQCb/G7BKo3aoGx8v61wmZfWojj9CYyUSYjG+i2 23rEYuupfQBe8fF0EzSQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oktxP-00AVUy-7l; Tue, 18 Oct 2022 21:17:03 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oktwD-00AUzD-GF for linux-arm-kernel@lists.infradead.org; Tue, 18 Oct 2022 21:15:51 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 29ILFdFA098748; Tue, 18 Oct 2022 16:15:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1666127739; bh=4kIUPegi/LXZoitvNCVavpaLE5WUQTmItgHAcedGvS8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=GoHaZi8hj1wmPdSoByG2ccXRtr1Yj5QVRvwgpKNgfPynom6CTOzuxJ19zUfBEw8Mo CpBGACYXNCqOQY+NYvSbmMhTUxIJ/bZJbjvuf1FZgWZrUwe0HQS1Iti7TE0oRm4Im3 nmTUgzJLRUrM/tTdV5ENtE2HYWrpH4CaT2Sj/sjw= Received: from DLEE112.ent.ti.com (dlee112.ent.ti.com [157.170.170.23]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 29ILFdGP014158 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 18 Oct 2022 16:15:39 -0500 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE112.ent.ti.com (157.170.170.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6; Tue, 18 Oct 2022 16:15:39 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.6 via Frontend Transport; Tue, 18 Oct 2022 16:15:39 -0500 Received: from ula0226330.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 29ILFXoJ014456; Tue, 18 Oct 2022 16:15:38 -0500 From: Andrew Davis To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Bryan Brattlof , , , CC: Andrew Davis Subject: [PATCH 09/10] arm64: dts: ti: k3-am62: Enable SDHCI nodes at the board level Date: Tue, 18 Oct 2022 16:15:32 -0500 Message-ID: <20221018211533.21335-10-afd@ti.com> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221018211533.21335-1-afd@ti.com> References: <20221018211533.21335-1-afd@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221018_141549_670753_5311B1C8 X-CRM114-Status: GOOD ( 12.36 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org SDHCI nodes defined in the top-level AM62x SoC dtsi files are incomplete and will not be functional unless they are extended with pinmux information. As the pinmux is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the SDHCI nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis --- arch/arm64/boot/dts/ti/k3-am62-main.dtsi | 3 +++ arch/arm64/boot/dts/ti/k3-am625-sk.dts | 2 ++ 2 files changed, 5 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi index 43eebff429ab..5a2cd474a761 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi @@ -407,6 +407,7 @@ sdhci0: mmc@fa10000 { ti,otap-del-sel-mmc-hs = <0x0>; ti,otap-del-sel-ddr52 = <0x9>; ti,otap-del-sel-hs200 = <0x6>; + status = "disabled"; }; sdhci1: mmc@fa00000 { @@ -430,6 +431,7 @@ sdhci1: mmc@fa00000 { ti,itap-del-sel-sdr25 = <0x0>; ti,clkbuf-sel = <0x7>; bus-width = <4>; + status = "disabled"; }; sdhci2: mmc@fa20000 { @@ -452,6 +454,7 @@ sdhci2: mmc@fa20000 { ti,itap-del-sel-sdr12 = <0x0>; ti,itap-del-sel-sdr25 = <0x0>; ti,clkbuf-sel = <0x7>; + status = "disabled"; }; fss: bus@fc00000 { diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk.dts b/arch/arm64/boot/dts/ti/k3-am625-sk.dts index b6d53366ec50..3c98b639b0b2 100644 --- a/arch/arm64/boot/dts/ti/k3-am625-sk.dts +++ b/arch/arm64/boot/dts/ti/k3-am625-sk.dts @@ -335,6 +335,7 @@ exp1: gpio@22 { }; &sdhci0 { + status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&main_mmc0_pins_default>; ti,driver-strength-ohm = <50>; @@ -343,6 +344,7 @@ &sdhci0 { &sdhci1 { /* SD/MMC */ + status = "okay"; vmmc-supply = <&vdd_mmc1>; vqmmc-supply = <&vdd_sd_dv>; pinctrl-names = "default";