| Message ID | 20221024201515.34129-6-jernej.skrabec@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | media: cedrus: Format handling improvements and 10-bit HEVC support | expand |
Hi, On Mon 24 Oct 22, 22:15, Jernej Skrabec wrote: > Because not all Cedrus variants supports all codecs, controls should be > registered only if codec related to individual control is supported by > Cedrus. > > Replace codec enum, which is not used at all, with capabilities flags > and register control only if capabilities are met. > > Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Acked-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Cheers, Paul > --- > drivers/staging/media/sunxi/cedrus/cedrus.c | 45 +++++++++++---------- > drivers/staging/media/sunxi/cedrus/cedrus.h | 2 +- > 2 files changed, 25 insertions(+), 22 deletions(-) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c > index 2f284a58d787..023566b02dc5 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c > @@ -77,56 +77,56 @@ static const struct cedrus_control cedrus_controls[] = { > .cfg = { > .id = V4L2_CID_STATELESS_MPEG2_SEQUENCE, > }, > - .codec = CEDRUS_CODEC_MPEG2, > + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_MPEG2_PICTURE, > }, > - .codec = CEDRUS_CODEC_MPEG2, > + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_MPEG2_QUANTISATION, > }, > - .codec = CEDRUS_CODEC_MPEG2, > + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_DECODE_PARAMS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_SLICE_PARAMS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_SPS, > .ops = &cedrus_ctrl_ops, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_PPS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_SCALING_MATRIX, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_PRED_WEIGHTS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > @@ -134,7 +134,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED, > .def = V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > @@ -142,7 +142,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = V4L2_STATELESS_H264_START_CODE_NONE, > .def = V4L2_STATELESS_H264_START_CODE_NONE, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > /* > * We only expose supported profiles information, > @@ -160,20 +160,20 @@ static const struct cedrus_control cedrus_controls[] = { > .menu_skip_mask = > BIT(V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED), > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_SPS, > .ops = &cedrus_ctrl_ops, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_PPS, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -181,13 +181,13 @@ static const struct cedrus_control cedrus_controls[] = { > /* The driver can only handle 1 entry per slice for now */ > .dims = { 1 }, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -197,7 +197,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = 0xffffffff, > .step = 1, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -205,7 +205,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED, > .def = V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -213,19 +213,19 @@ static const struct cedrus_control cedrus_controls[] = { > .max = V4L2_STATELESS_HEVC_START_CODE_NONE, > .def = V4L2_STATELESS_HEVC_START_CODE_NONE, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_VP8_FRAME, > }, > - .codec = CEDRUS_CODEC_VP8, > + .capabilities = CEDRUS_CAPABILITY_VP8_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > }; > > @@ -275,6 +275,9 @@ static int cedrus_init_ctrls(struct cedrus_dev *dev, struct cedrus_ctx *ctx) > return -ENOMEM; > > for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { > + if (!cedrus_is_capable(ctx, cedrus_controls[i].capabilities)) > + continue; > + > ctrl = v4l2_ctrl_new_custom(hdl, &cedrus_controls[i].cfg, > NULL); > if (hdl->error) { > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h > index 1a98790a99af..7a1619967513 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h > @@ -57,7 +57,7 @@ enum cedrus_h264_pic_type { > > struct cedrus_control { > struct v4l2_ctrl_config cfg; > - enum cedrus_codec codec; > + unsigned int capabilities; > }; > > struct cedrus_h264_run { > -- > 2.38.1 >
Dne ponedeljek, 24. oktober 2022 ob 22:15:09 CET je Jernej Skrabec napisal(a): > Because not all Cedrus variants supports all codecs, controls should be > registered only if codec related to individual control is supported by > Cedrus. > > Replace codec enum, which is not used at all, with capabilities flags > and register control only if capabilities are met. > > Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> > --- > drivers/staging/media/sunxi/cedrus/cedrus.c | 45 +++++++++++---------- > drivers/staging/media/sunxi/cedrus/cedrus.h | 2 +- > 2 files changed, 25 insertions(+), 22 deletions(-) > > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c > b/drivers/staging/media/sunxi/cedrus/cedrus.c index > 2f284a58d787..023566b02dc5 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus.c > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c > @@ -77,56 +77,56 @@ static const struct cedrus_control cedrus_controls[] = { > .cfg = { > .id = V4L2_CID_STATELESS_MPEG2_SEQUENCE, > }, > - .codec = CEDRUS_CODEC_MPEG2, > + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_MPEG2_PICTURE, > }, > - .codec = CEDRUS_CODEC_MPEG2, > + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_MPEG2_QUANTISATION, > }, > - .codec = CEDRUS_CODEC_MPEG2, > + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_DECODE_PARAMS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_SLICE_PARAMS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_SPS, > .ops = &cedrus_ctrl_ops, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_PPS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_SCALING_MATRIX, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_H264_PRED_WEIGHTS, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > @@ -134,7 +134,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED, > .def = V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > @@ -142,7 +142,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = V4L2_STATELESS_H264_START_CODE_NONE, > .def = V4L2_STATELESS_H264_START_CODE_NONE, > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > /* > * We only expose supported profiles information, > @@ -160,20 +160,20 @@ static const struct cedrus_control cedrus_controls[] = > { .menu_skip_mask = > BIT(V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED), > }, > - .codec = CEDRUS_CODEC_H264, > + .capabilities = CEDRUS_CAPABILITY_H264_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_SPS, > .ops = &cedrus_ctrl_ops, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_PPS, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -181,13 +181,13 @@ static const struct cedrus_control cedrus_controls[] = > { /* The driver can only handle 1 entry per slice for now */ > .dims = { 1 }, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -197,7 +197,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = 0xffffffff, > .step = 1, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -205,7 +205,7 @@ static const struct cedrus_control cedrus_controls[] = { > .max = V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED, > .def = V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > @@ -213,19 +213,19 @@ static const struct cedrus_control cedrus_controls[] = > { .max = V4L2_STATELESS_HEVC_START_CODE_NONE, > .def = V4L2_STATELESS_HEVC_START_CODE_NONE, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_VP8_FRAME, > }, > - .codec = CEDRUS_CODEC_VP8, > + .capabilities = CEDRUS_CAPABILITY_VP8_DEC, > }, > { > .cfg = { > .id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, > }, > - .codec = CEDRUS_CODEC_H265, > + .capabilities = CEDRUS_CAPABILITY_H265_DEC, > }, > }; > > @@ -275,6 +275,9 @@ static int cedrus_init_ctrls(struct cedrus_dev *dev, > struct cedrus_ctx *ctx) return -ENOMEM; > > for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { > + if (!cedrus_is_capable(ctx, cedrus_controls[i].capabilities)) > + continue; While it's not visible from this commit, above filtering causes issues when searching for controls in ctx->ctrls[]. Now are not packed together and search functions (cedrus_find_control_data, cedrus_get_num_of_controls) rely on controls not being null. null control marks end of the array. I'll fix that in next revision. Best regards, Jernej > + > ctrl = v4l2_ctrl_new_custom(hdl, &cedrus_controls[i].cfg, > NULL); > if (hdl->error) { > diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h > b/drivers/staging/media/sunxi/cedrus/cedrus.h index > 1a98790a99af..7a1619967513 100644 > --- a/drivers/staging/media/sunxi/cedrus/cedrus.h > +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h > @@ -57,7 +57,7 @@ enum cedrus_h264_pic_type { > > struct cedrus_control { > struct v4l2_ctrl_config cfg; > - enum cedrus_codec codec; > + unsigned int capabilities; > }; > > struct cedrus_h264_run { > -- > 2.38.1
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.c b/drivers/staging/media/sunxi/cedrus/cedrus.c index 2f284a58d787..023566b02dc5 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.c +++ b/drivers/staging/media/sunxi/cedrus/cedrus.c @@ -77,56 +77,56 @@ static const struct cedrus_control cedrus_controls[] = { .cfg = { .id = V4L2_CID_STATELESS_MPEG2_SEQUENCE, }, - .codec = CEDRUS_CODEC_MPEG2, + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_MPEG2_PICTURE, }, - .codec = CEDRUS_CODEC_MPEG2, + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_MPEG2_QUANTISATION, }, - .codec = CEDRUS_CODEC_MPEG2, + .capabilities = CEDRUS_CAPABILITY_MPEG2_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_H264_DECODE_PARAMS, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_H264_SLICE_PARAMS, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_H264_SPS, .ops = &cedrus_ctrl_ops, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_H264_PPS, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_H264_SCALING_MATRIX, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_H264_PRED_WEIGHTS, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { @@ -134,7 +134,7 @@ static const struct cedrus_control cedrus_controls[] = { .max = V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED, .def = V4L2_STATELESS_H264_DECODE_MODE_SLICE_BASED, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { @@ -142,7 +142,7 @@ static const struct cedrus_control cedrus_controls[] = { .max = V4L2_STATELESS_H264_START_CODE_NONE, .def = V4L2_STATELESS_H264_START_CODE_NONE, }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, /* * We only expose supported profiles information, @@ -160,20 +160,20 @@ static const struct cedrus_control cedrus_controls[] = { .menu_skip_mask = BIT(V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED), }, - .codec = CEDRUS_CODEC_H264, + .capabilities = CEDRUS_CAPABILITY_H264_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_HEVC_SPS, .ops = &cedrus_ctrl_ops, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_HEVC_PPS, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, { .cfg = { @@ -181,13 +181,13 @@ static const struct cedrus_control cedrus_controls[] = { /* The driver can only handle 1 entry per slice for now */ .dims = { 1 }, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_HEVC_SCALING_MATRIX, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, { .cfg = { @@ -197,7 +197,7 @@ static const struct cedrus_control cedrus_controls[] = { .max = 0xffffffff, .step = 1, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, { .cfg = { @@ -205,7 +205,7 @@ static const struct cedrus_control cedrus_controls[] = { .max = V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED, .def = V4L2_STATELESS_HEVC_DECODE_MODE_SLICE_BASED, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, { .cfg = { @@ -213,19 +213,19 @@ static const struct cedrus_control cedrus_controls[] = { .max = V4L2_STATELESS_HEVC_START_CODE_NONE, .def = V4L2_STATELESS_HEVC_START_CODE_NONE, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_VP8_FRAME, }, - .codec = CEDRUS_CODEC_VP8, + .capabilities = CEDRUS_CAPABILITY_VP8_DEC, }, { .cfg = { .id = V4L2_CID_STATELESS_HEVC_DECODE_PARAMS, }, - .codec = CEDRUS_CODEC_H265, + .capabilities = CEDRUS_CAPABILITY_H265_DEC, }, }; @@ -275,6 +275,9 @@ static int cedrus_init_ctrls(struct cedrus_dev *dev, struct cedrus_ctx *ctx) return -ENOMEM; for (i = 0; i < CEDRUS_CONTROLS_COUNT; i++) { + if (!cedrus_is_capable(ctx, cedrus_controls[i].capabilities)) + continue; + ctrl = v4l2_ctrl_new_custom(hdl, &cedrus_controls[i].cfg, NULL); if (hdl->error) { diff --git a/drivers/staging/media/sunxi/cedrus/cedrus.h b/drivers/staging/media/sunxi/cedrus/cedrus.h index 1a98790a99af..7a1619967513 100644 --- a/drivers/staging/media/sunxi/cedrus/cedrus.h +++ b/drivers/staging/media/sunxi/cedrus/cedrus.h @@ -57,7 +57,7 @@ enum cedrus_h264_pic_type { struct cedrus_control { struct v4l2_ctrl_config cfg; - enum cedrus_codec codec; + unsigned int capabilities; }; struct cedrus_h264_run {
Because not all Cedrus variants supports all codecs, controls should be registered only if codec related to individual control is supported by Cedrus. Replace codec enum, which is not used at all, with capabilities flags and register control only if capabilities are met. Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> --- drivers/staging/media/sunxi/cedrus/cedrus.c | 45 +++++++++++---------- drivers/staging/media/sunxi/cedrus/cedrus.h | 2 +- 2 files changed, 25 insertions(+), 22 deletions(-)