From patchwork Wed Oct 26 05:50:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Daniel Kachhap X-Patchwork-Id: 13020169 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61518C433FE for ; Wed, 26 Oct 2022 05:53:03 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JFKEhPXtXssu1kSVHHv+7kAvuvfSi4eRbf47ppYkGT4=; b=RkLvUEZ6tdoGEy Qy5rdygOzNjFZm2CDgg619mjCjCPEJYRskgSXTGmIs8YHUC6KbQExA88+Z4Khn0EcYA9VEyG4LhEL KLAIfPxebCtZa1JBpJkUpZn7qbi3Rlq1Wfz1ICjdqbiMNiGawf8Zgdnf7bYzlXrl1jPc4Q18N9OZ9 iDSW1L0ZPVEBeQWRSDjFLPBYERRnMct9JpJmrMMYg5Mxzxo/18UfJaBr7Ih56u8BrcYIRqF7cp2Ff biq5rIPZ64jPTZTuMu7OJkXKfBgxdzt2K0mdhkZcWcMs95w5PKrDPqnsBgmST5dOMl3leOLcnqyRN m1fnLueDH9YE+6bMe5CA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1onZKd-0083NJ-3q; Wed, 26 Oct 2022 05:52:03 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1onZJa-0082ts-VB for linux-arm-kernel@lists.infradead.org; Wed, 26 Oct 2022 05:51:01 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id D85C5D6E; Tue, 25 Oct 2022 22:51:04 -0700 (PDT) Received: from a077416.blr.arm.com (unknown [10.162.42.8]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E62CF3F7B4; Tue, 25 Oct 2022 22:50:56 -0700 (PDT) From: Amit Daniel Kachhap To: Russell King Cc: patches@armlinux.org.uk, linux-arm-kernel@lists.infradead.org, Amit Daniel Kachhap Subject: [PATCH 8/8] ARM: Add hwcap for Speculative Store Bypassing Safe Date: Wed, 26 Oct 2022 11:20:01 +0530 Message-Id: <20221026055001.12986-9-amit.kachhap@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221026055001.12986-1-amit.kachhap@arm.com> References: <20221026055001.12986-1-amit.kachhap@arm.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221025_225059_067428_4C928A1F X-CRM114-Status: GOOD ( 11.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Speculative Store Bypassing Safe(FEAT_SSBS) is a feature present in AArch32 state for Armv8 and is represented by ID_PFR2_EL1.SSBS identification register. This feature denotes the presence of PSTATE.ssbs bit and hence adding a hwcap will enable the userspace to check it before trying to set/unset this PSTATE. This commit adds the ID feature bit detection, and uses elf_hwcap2 accordingly. Signed-off-by: Amit Daniel Kachhap --- arch/arm/include/uapi/asm/hwcap.h | 1 + arch/arm/kernel/setup.c | 8 ++++++++ 2 files changed, 9 insertions(+) diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h index bc9e7d318e25..6b2023e39b6f 100644 --- a/arch/arm/include/uapi/asm/hwcap.h +++ b/arch/arm/include/uapi/asm/hwcap.h @@ -44,5 +44,6 @@ #define HWCAP2_SHA2 (1 << 3) #define HWCAP2_CRC32 (1 << 4) #define HWCAP2_SB (1 << 5) +#define HWCAP2_SSBS (1 << 6) #endif /* _UAPI__ASMARM_HWCAP_H */ diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index f676c54e5d14..75cd4699e7b3 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -451,6 +451,7 @@ static void __init cpuid_init_hwcaps(void) int block; u32 isar5; u32 isar6; + u32 pfr2; if (cpu_architecture() < CPU_ARCH_ARMv7) return; @@ -492,6 +493,12 @@ static void __init cpuid_init_hwcaps(void) block = cpuid_feature_extract_field(isar6, 12); if (block >= 1) elf_hwcap2 |= HWCAP2_SB; + + /* Check for Speculative Store Bypassing control */ + pfr2 = read_cpuid_ext(CPUID_EXT_PFR2); + block = cpuid_feature_extract_field(pfr2, 4); + if (block >= 1) + elf_hwcap2 |= HWCAP2_SSBS; } static void __init elf_hwcap_fixup(void) @@ -1272,6 +1279,7 @@ static const char *hwcap2_str[] = { "sha2", "crc32", "sb", + "ssbs", NULL };