@@ -1456,6 +1456,8 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-pro4-ace.dtb \
uniphier-pro4-ref.dtb \
uniphier-pro4-sanji.dtb \
+ uniphier-pro5-epcore.dtb \
+ uniphier-pro5-proex.dtb \
uniphier-pxs2-gentil.dtb \
uniphier-pxs2-vodka.dtb \
uniphier-sld8-ref.dtb
new file mode 100644
@@ -0,0 +1,76 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Source for UniPhier Pro5 EP-CORE Board (Pro5-PCIe_EP-CORE)
+ *
+ * Copyright (C) 2021 Socionext Inc.
+ * Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
+ */
+
+/dts-v1/;
+#include "uniphier-pro5.dtsi"
+#include "uniphier-support-card.dtsi"
+
+/ {
+ model = "UniPhier Pro5 EP-CORE Board";
+ compatible = "socionext,uniphier-pro5-epcore", "socionext,uniphier-pro5";
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ i2c0 = &i2c0;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+ðsc {
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&serialsc {
+ interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
+};
+
+&serial0 {
+ status = "okay";
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
+
+&emmc {
+ status = "okay";
+};
+
+&sd {
+ status = "okay";
+};
+
+&pcie_ep {
+ status = "okay";
+};
new file mode 100644
@@ -0,0 +1,59 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Device Tree Source for UniPhier Pro5 ProEX Board
+ *
+ * Copyright (C) 2021 Socionext Inc.
+ * Author: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
+ */
+
+/dts-v1/;
+#include "uniphier-pro5.dtsi"
+
+/ {
+ model = "UniPhier Pro5 ProEX Board";
+ compatible = "socionext,uniphier-pro5-proex", "socionext,uniphier-pro5";
+
+ chosen {
+ stdout-path = "serial2:115200n8";
+ };
+
+ aliases {
+ serial1 = &serial1;
+ serial2 = &serial2;
+ i2c0 = &i2c0;
+ i2c1 = &i2c3;
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x40000000>;
+ };
+};
+
+&serial1 {
+ status = "okay";
+};
+
+&serial2 {
+ status = "okay";
+};
+
+&i2c0 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&usb1 {
+ status = "okay";
+};
+
+&emmc {
+ status = "okay";
+};
+
+&pcie_ep {
+ status = "okay";
+};
Initial version of devicetree sources for Pro5 EPCORE and ProEX boards. Pro5 EPCORE board is a kind of Pro5 reference board with PCIe endpoint card edge connector. ProEX board also has PCIe endpoint card edge, and some peripherals are shared with other system and can't be used in Linux. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- arch/arm/boot/dts/Makefile | 2 + arch/arm/boot/dts/uniphier-pro5-epcore.dts | 76 ++++++++++++++++++++++ arch/arm/boot/dts/uniphier-pro5-proex.dts | 59 +++++++++++++++++ 3 files changed, 137 insertions(+) create mode 100644 arch/arm/boot/dts/uniphier-pro5-epcore.dts create mode 100644 arch/arm/boot/dts/uniphier-pro5-proex.dts