From patchwork Mon Nov 21 14:40:06 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Gleixner X-Patchwork-Id: 13051242 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4DBCEC433FE for ; Mon, 21 Nov 2022 15:02:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Date:MIME-Version:References:Subject:Cc :To:From:Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: List-Owner; bh=Ka5w1MVOBcufvo07DUEVcR4TuYxIdCdHjU/DpNTcVLw=; b=1kU8Wr5zXl8+gJ 38cptjstgIUcTdktwj4Yc1yDnCkbw0kSYDOtIYbELg4mzColECt33ABkz4Cc114Mw3GGQygPBRsXg /wtEwfeirCj61k0jJsN+kkJ/6034ep0G+Hig38FUB+VSVwWuTOpTlq1sG5Crz+8oRp39qPfTgiwYT 0kPAypkZAS6JVuBiuK7byy07LKQNdWU1gs2+78zSrN6QOqE1mp9A+L6BqOP6/c/OBJCKgQxFbAvaq oP9Taj8RrMu1+n8NyiYVpgCFaMfFK/uwkj8h3jjDbJHSW10r41+rdVrW2nd4WHMpNNX9/yFh1GReq NEIohKIrPwJ4OVLiLwCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ox8IG-00Ex36-3c; Mon, 21 Nov 2022 15:01:08 +0000 Received: from galois.linutronix.de ([2a0a:51c0:0:12e:550::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ox7xv-00Eiz8-V7 for linux-arm-kernel@lists.infradead.org; Mon, 21 Nov 2022 14:40:09 +0000 Message-ID: <20221121140050.197229661@linutronix.de> DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020; t=1669041606; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=G8YuXi8Rg+vVdoNzuTDwjeofGOju3zeDQbEjL5nZHEE=; b=YOQKK2nnOQ1IXPk9vH/EagvBlX6G4xVHr8a6G+uky088c975d+5Hndkbp3K6I2MGh4Ee8b 0uKnQjJ1smsvhKfyxTDlLRXTwZ3TnX+wkwM+ORJuD/yAwRdqu2krdi6HIf5rbsWT5RpicW ksb0oojIrgGmL1d8toGHW2jgevHFFPzGBnbCUolDZDrgxk13tixqJwZwORrJ1RECz0XRwk +CbRdACwFYv3ff5yXBONXQSqsBrEWl/nM/e2jzg5oBVczrRNKm6ffwZH1s5dkPuhny7vmm SGoffbJIgjO9ksJiBftVQFLyhMZKxLD8PF6yZRTERgxt5bNwzx7XMyTH4WRWKg== DKIM-Signature: v=1; a=ed25519-sha256; c=relaxed/relaxed; d=linutronix.de; s=2020e; t=1669041606; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: references:references; bh=G8YuXi8Rg+vVdoNzuTDwjeofGOju3zeDQbEjL5nZHEE=; b=1lmfc7siUnz/pvs8AAkAZagUcCbTHY8LDY3w77W70/CxajfzItxvOszV2S0J4L8f6hyx28 7gqM6d8r3MA7+zDw== From: Thomas Gleixner To: LKML Cc: Will Deacon , linux-pci@vger.kernel.org, Bjorn Helgaas , Lorenzo Pieralisi , Marc Zyngier , Greg Kroah-Hartman , Jason Gunthorpe , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Ammar Faizi , Robin Murphy , Lorenzo Pieralisi , Nishanth Menon , Tero Kristo , Santosh Shilimkar , linux-arm-kernel@lists.infradead.org, Vinod Koul , Sinan Kaya , Andy Gross , Bjorn Andersson , Mark Rutland , Shameerali Kolothum Thodi , Zenghui Yu , Shawn Guo , Sascha Hauer , Fabio Estevam Subject: [patch V2 30/40] genirq/gic-v3-mbi: Switch to MSI parent References: <20221121135653.208611233@linutronix.de> MIME-Version: 1.0 Date: Mon, 21 Nov 2022 15:40:06 +0100 (CET) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221121_064008_333744_A2CEAAB7 X-CRM114-Status: GOOD ( 17.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org All platform MSI users and the PCI/MSI code handle per device MSI domains when the irqdomain associated to the device provides MSI parent functionality. Remove the "global" PCI/MSI and platform domain related code and provide the MSI parent functionality by filling in msi_parent_ops. Signed-off-by: Thomas Gleixner Cc: Thomas Gleixner Cc: Marc Zyngier --- drivers/irqchip/irq-gic-v3-mbi.c | 122 ++++++++++----------------------------- 1 file changed, 32 insertions(+), 90 deletions(-) --- a/drivers/irqchip/irq-gic-v3-mbi.c +++ b/drivers/irqchip/irq-gic-v3-mbi.c @@ -18,6 +18,8 @@ #include +#include "irq-gic-msi-lib.h" + struct mbi_range { u32 spi_start; u32 nr_spis; @@ -29,6 +31,15 @@ static phys_addr_t mbi_phys_base; static struct mbi_range *mbi_ranges; static unsigned int mbi_range_nr; +static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) +{ + msg[0].address_hi = upper_32_bits(mbi_phys_base + GICD_SETSPI_NSR); + msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR); + msg[0].data = data->hwirq; + + iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); +} + static struct irq_chip mbi_irq_chip = { .name = "MBI", .irq_mask = irq_chip_mask_parent, @@ -36,11 +47,11 @@ static struct irq_chip mbi_irq_chip = { .irq_eoi = irq_chip_eoi_parent, .irq_set_type = irq_chip_set_type_parent, .irq_set_affinity = irq_chip_set_affinity_parent, + .irq_compose_msi_msg = mbi_compose_msi_msg, }; -static int mbi_irq_gic_domain_alloc(struct irq_domain *domain, - unsigned int virq, - irq_hw_number_t hwirq) +static int mbi_irq_gic_domain_alloc(struct irq_domain *domain, unsigned int virq, + irq_hw_number_t hwirq) { struct irq_fwspec fwspec; struct irq_data *d; @@ -138,85 +149,30 @@ static void mbi_irq_domain_free(struct i } static const struct irq_domain_ops mbi_domain_ops = { + .select = gic_msi_lib_irq_domain_select, .alloc = mbi_irq_domain_alloc, .free = mbi_irq_domain_free, }; -static void mbi_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) -{ - msg[0].address_hi = upper_32_bits(mbi_phys_base + GICD_SETSPI_NSR); - msg[0].address_lo = lower_32_bits(mbi_phys_base + GICD_SETSPI_NSR); - msg[0].data = data->parent_data->hwirq; - - iommu_dma_compose_msi_msg(irq_data_get_msi_desc(data), msg); -} - -#ifdef CONFIG_PCI_MSI -/* PCI-specific irqchip */ -static void mbi_mask_msi_irq(struct irq_data *d) -{ - pci_msi_mask_irq(d); - irq_chip_mask_parent(d); -} +#define MBI_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ + MSI_FLAG_USE_DEF_CHIP_OPS) -static void mbi_unmask_msi_irq(struct irq_data *d) -{ - pci_msi_unmask_irq(d); - irq_chip_unmask_parent(d); -} +#define MBI_MSI_FLAGS_SUPPORTED (MSI_GENERIC_FLAGS_MASK | \ + MSI_FLAG_PCI_MSIX | \ + MSI_FLAG_MULTI_PCI_MSI) -static struct irq_chip mbi_msi_irq_chip = { - .name = "MSI", - .irq_mask = mbi_mask_msi_irq, - .irq_unmask = mbi_unmask_msi_irq, - .irq_eoi = irq_chip_eoi_parent, - .irq_compose_msi_msg = mbi_compose_msi_msg, +static const struct msi_parent_ops gic_v3_mbi_msi_parent_ops = { + .supported_flags = MBI_MSI_FLAGS_SUPPORTED, + .required_flags = MBI_MSI_FLAGS_REQUIRED, + .bus_select_token = DOMAIN_BUS_NEXUS, + .bus_select_mask = MATCH_PCI_MSI | MATCH_PLATFORM_MSI, + .prefix = "MBI-", + .init_dev_msi_info = gic_msi_lib_init_dev_msi_info, }; -static struct msi_domain_info mbi_msi_domain_info = { - .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_PCI_MSIX | MSI_FLAG_MULTI_PCI_MSI), - .chip = &mbi_msi_irq_chip, -}; - -static int mbi_allocate_pci_domain(struct irq_domain *nexus_domain, - struct irq_domain **pci_domain) -{ - *pci_domain = pci_msi_create_irq_domain(nexus_domain->parent->fwnode, - &mbi_msi_domain_info, - nexus_domain); - if (!*pci_domain) - return -ENOMEM; - - return 0; -} -#else -static int mbi_allocate_pci_domain(struct irq_domain *nexus_domain, - struct irq_domain **pci_domain) +static int mbi_allocate_domain(struct irq_domain *parent) { - *pci_domain = NULL; - return 0; -} -#endif - -/* Platform-MSI specific irqchip */ -static struct irq_chip mbi_pmsi_irq_chip = { - .name = "pMSI", -}; - -static struct msi_domain_ops mbi_pmsi_ops = { -}; - -static struct msi_domain_info mbi_pmsi_domain_info = { - .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), - .ops = &mbi_pmsi_ops, - .chip = &mbi_pmsi_irq_chip, -}; - -static int mbi_allocate_domains(struct irq_domain *parent) -{ - struct irq_domain *nexus_domain, *pci_domain, *plat_domain; - int err; + struct irq_domain *nexus_domain; nexus_domain = irq_domain_create_tree(parent->fwnode, &mbi_domain_ops, NULL); @@ -225,22 +181,8 @@ static int mbi_allocate_domains(struct i irq_domain_update_bus_token(nexus_domain, DOMAIN_BUS_NEXUS); nexus_domain->parent = parent; - - err = mbi_allocate_pci_domain(nexus_domain, &pci_domain); - - plat_domain = platform_msi_create_irq_domain(parent->fwnode, - &mbi_pmsi_domain_info, - nexus_domain); - - if (err || !plat_domain) { - if (plat_domain) - irq_domain_remove(plat_domain); - if (pci_domain) - irq_domain_remove(pci_domain); - irq_domain_remove(nexus_domain); - return -ENOMEM; - } - + nexus_domain->flags |= IRQ_DOMAIN_FLAG_MSI_PARENT; + nexus_domain->msi_parent_ops = &gic_v3_mbi_msi_parent_ops; return 0; } @@ -303,7 +245,7 @@ int __init mbi_init(struct fwnode_handle pr_info("Using MBI frame %pa\n", &mbi_phys_base); - ret = mbi_allocate_domains(parent); + ret = mbi_allocate_domain(parent); if (ret) goto err_free_mbi;