From patchwork Thu Nov 24 11:15:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 13054847 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AD2CC43219 for ; Thu, 24 Nov 2022 11:18:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9apnSbwkzcDZGjE8hy2JzyfeNy220ZproeqMqbT23c0=; b=B5gvn2SohdIv+0 6zlgCID1QqmWw9UvWln6tOTsMw3d8+j+xFSQ0BTRbv7FI8G7/zYgC8dFs4Apiv4uPBe7KnNKweJop LyA5Vu+fwRRyPeJ72xjudMv8cdOf3IAXZ2gXTJsQzZBywuMfUOtw37zowup2tEtfRM1WyWLTk1ssj ezTe7LBYRjDkWitdeZUMROLQg/PKApuaWFnwUVLz2QUs9iKlHuWvLCIHUSGWW2AO38KQ3zljnyFGk n6KKvlRVAJQMIIg2Ylu2qqjVTrY3vhxXt43tdsCI/kEhaHWKU5bcnl1Me0dZEsNQCrA/hpHBxNk2w 2KkYq9Qwa8TiaqV1kxyg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oyAEY-007z1v-82; Thu, 24 Nov 2022 11:17:34 +0000 Received: from relay5-d.mail.gandi.net ([217.70.183.197]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oyADH-007yTP-8P for linux-arm-kernel@lists.infradead.org; Thu, 24 Nov 2022 11:16:17 +0000 Received: (Authenticated sender: miquel.raynal@bootlin.com) by mail.gandi.net (Postfix) with ESMTPSA id 7F04F1C001B; Thu, 24 Nov 2022 11:16:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1669288573; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=HV9/wEcExWLHQQPoN4mFGB5lnbuV27WEICfLca/Ccg0=; b=dRef3dKVQm1MjPwdeKlmDsIQg65JK/ItXzI8EhvXIW1WoZcnr2hHPmVN2E5zGsQaEW7cHe OxtGw2q/VyZ0g4sP9IjLnIPizb6/rYqEl/SCzbm5EjybyUq5hgM0G43Cx/QlXohSKoiIlo jX+WH4NEAV5KZBZ6YcJtOhL/SBz8wgdhcgTorCUB43YltD8YXTtahbFQreaeQd3LzxXmUi 3fpR8M/bDW0K+ydZAKhmdrDtmanmq/s9R0dqEhOg1PQq/DDDN4mM8vpvLXtpIAmFQmhAHY 5a8+NHfap3GfF6IAkqJ68mx2nbNSe9/xJxFQUA6T7Ksf6P2XtM+W82qUeYI0XA== From: Miquel Raynal To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet , netdev@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , devicetree@vger.kernel.org, Robert Marko , Luka Perkov , Thomas Petazzoni , Michael Walle , Marcin Wojtas , , , Vadym Kochan , Miquel Raynal , Rob Herring Subject: [PATCH net-next v2 4/7] dt-bindings: net: marvell,prestera: Describe PCI devices of the prestera family Date: Thu, 24 Nov 2022 12:15:53 +0100 Message-Id: <20221124111556.264647-5-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221124111556.264647-1-miquel.raynal@bootlin.com> References: <20221124111556.264647-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221124_031615_633585_5896B583 X-CRM114-Status: GOOD ( 10.27 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Even though the devices have very little in common beside the name and the main "switch" feature, Marvell Prestera switch family is also composed of PCI-only devices which can receive additional static properties, like nvmem cells to point at MAC addresses, for instance. Let's describe them. Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- .../bindings/net/marvell,prestera.yaml | 62 ++++++++++++++++--- 1 file changed, 54 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/net/marvell,prestera.yaml b/Documentation/devicetree/bindings/net/marvell,prestera.yaml index b0a3ecca406e..5ea8b73663a5 100644 --- a/Documentation/devicetree/bindings/net/marvell,prestera.yaml +++ b/Documentation/devicetree/bindings/net/marvell,prestera.yaml @@ -4,19 +4,24 @@ $id: http://devicetree.org/schemas/net/marvell,prestera.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Marvell Prestera AlleyCat3 switch +title: Marvell Prestera switch family maintainers: - Miquel Raynal properties: compatible: - items: + oneOf: + - items: + - enum: + - marvell,prestera-98dx3236 + - marvell,prestera-98dx3336 + - marvell,prestera-98dx4251 + - const: marvell,prestera - enum: - - marvell,prestera-98dx3236 - - marvell,prestera-98dx3336 - - marvell,prestera-98dx4251 - - const: marvell,prestera + - pci11ab,c804 + - pci11ab,c80c + - pci11ab,cc1e reg: maxItems: 1 @@ -28,12 +33,37 @@ properties: description: Reference to the DFX Server bus node. $ref: /schemas/types.yaml#/definitions/phandle + nvmem-cells: true + + nvmem-cell-names: true + +if: + properties: + compatible: + contains: + const: marvell,prestera + +# Memory mapped AlleyCat3 family +then: + properties: + nvmem-cells: false + nvmem-cell-names: false + required: + - interrupts + +# PCI Aldrin family +else: + properties: + interrupts: false + dfx: false + required: - compatible - reg - - interrupts -additionalProperties: false +# Ports can also be described +additionalProperties: + type: object examples: - | @@ -43,3 +73,19 @@ examples: interrupts = <33>, <34>, <35>; dfx = <&dfx>; }; + + - | + pcie@0 { + #address-cells = <3>; + #size-cells = <2>; + ranges = <0x0 0x0 0x0 0x0 0x0 0x0>; + reg = <0x0 0x0 0x0 0x0 0x0 0x0>; + device_type = "pci"; + + switch@0,0 { + reg = <0x0 0x0 0x0 0x0 0x0>; + compatible = "pci11ab,c80c"; + nvmem-cells = <&mac_address 0>; + nvmem-cell-names = "mac-address"; + }; + };