From patchwork Tue Nov 29 16:14:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 13058806 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BAB3AC433FE for ; Tue, 29 Nov 2022 16:18:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BCWUszCKt4iOob1rfckZTwAyiFFRxtr16saf+MrcAMY=; b=jqs7HN00VS53Pc XyoaOigIzp6jAxLmOKg2kT3+3jFQy8y4xyaJmaxH91lceiuJDt50HYP1KYWFYFEQP2Y2SZs6QYcy5 Nd3aKCW1qWCzgO2EYqSDqmpwK/3oId4x7zYjqAPwowtbMu6FuQXOlTpWRAcuNH8sijwd1lJugzJFR c1HhTREHlnd9uYd9GIUPd57bJjSBfXsiGesK4eGWRc+PtwnWEzxT6blE4ukVqZZTdBy98MZg19tr+ ckWmmmNqIlpm+6l9BPb5QV0rJK5TI5kRAjZeIW1wSr18dmu7s/1jCt+gj5hCchwU7aH3z6b1dMXO7 Xlgx7imJIlRuQ/wTsY+g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p03In-00A1cH-7f; Tue, 29 Nov 2022 16:17:46 +0000 Received: from ams.source.kernel.org ([2604:1380:4601:e00::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p03Fh-00A0Z1-O8 for linux-arm-kernel@lists.infradead.org; Tue, 29 Nov 2022 16:14:35 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 28128B816CF; Tue, 29 Nov 2022 16:14:32 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 90426C433D7; Tue, 29 Nov 2022 16:14:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1669738470; bh=Ml+Ny+IJGRPmjIFrsKAsVGEU9ak8prI+CI1vJoHufHo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mMzv7MRidRCQRzRB4gazXYhYVa6fgtwb07ud5qOZ7MiihpYiYQqy2LADaCKHUpmuj 98uvgdnXTvOPAJEkfHN9tPMD362XUlvi/BNF55c6ITqyezujOOWwInMJZhEEBW5t9b vPSFlfvfQXuGtS7epaO/k4LxD1Zruce6+HXcBRsm+vb/RXe7Q9g2pEdFbF9a6zm/2c 62VEonxAVF6aQV3cB2+do8fUylvTyz8WNR1evGi62Xz6X452bMedSDf+uh4mt7R+sW C3UcvUHayELxmC0fg9nlrwaxobc0591L41yBUyas/9r8SIvQzdxWlX92VZ6MZ8M9+t mdTwkazQbZQJw== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Will Deacon , Catalin Marinas , Marc Zyngier , Mark Rutland Subject: [PATCH v6 4/6] arm64: head: avoid cache invalidation when entering with the MMU on Date: Tue, 29 Nov 2022 17:14:16 +0100 Message-Id: <20221129161418.1968319-5-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221129161418.1968319-1-ardb@kernel.org> References: <20221129161418.1968319-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=1441; i=ardb@kernel.org; h=from:subject; bh=Ml+Ny+IJGRPmjIFrsKAsVGEU9ak8prI+CI1vJoHufHo=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBjhi/VX50O/LzTDrteHK0oAAH4EkQvG4SrQFt56fyb dW5nz6eJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCY4Yv1QAKCRDDTyI5ktmPJDjJDA CnZ8zqVpHeQxKWGN3LQwwBy+7hbPon5oX9GRfgL8OLqW2akw8PN2uFMaYHNkhFoF4G7f8hU8f43Waz EpnsvXfWdS9jLtacSkjZln2K81I6al5kAHoNelh0sY0XNgVKgGyXXUWHWmsF/z3ihTabbICTSa0lzP 1VOtkb5/uSZo9Q2X6iKGFqsLDgFyeYyrHsPMvOS1XD3rKDDzTZSl7ZQSOSn7g5P6/0DRQXaFy28hmw pGEjVoFNJvybhnOCWa9ngYvRtKi9vcj8Ea6Klonn3/phrBRQW/cpFYgnwO41s5/+qZ+Hky2Y1fPKM9 YI+jkHJupIqqGyOi5+cVdw8kSGa9vLqvQQUBqqPEoNEghV2xma/s4DBTZVJfCRG8sapIUrAOmwS3yi GGL7fxVBiP9pwrSBZDh8YcWZ2sZujg11frVspRurTSITc9pR/suOQVBHtTI4xHvRH1xuR7z+m10VGi VsnWGptoeHjD6/u9d1AdNK86QCUtSqOk4rNVyDtn5KDE0= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221129_081433_966273_37A7B046 X-CRM114-Status: GOOD ( 13.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org If we enter with the MMU on, there is no need for explicit cache invalidation for stores to memory, as they will be coherent with the caches. Let's take advantage of this, and create the ID map with the MMU still enabled if that is how we entered, and avoid any cache invalidation calls in that case. Signed-off-by: Ard Biesheuvel --- arch/arm64/kernel/head.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index c3b97f4ae6d769f7..5abf8f9fdd97b673 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -93,9 +93,9 @@ SYM_CODE_START(efi_primary_entry) SYM_INNER_LABEL(primary_entry, SYM_L_LOCAL) mov x19, xzr // MMU must be off on bare metal boot 0: bl preserve_boot_args + bl create_idmap bl init_kernel_el // w0=cpu_boot_mode mov x20, x0 - bl create_idmap /* * The following calls CPU setup code, see arch/arm64/mm/proc.S for @@ -381,12 +381,13 @@ SYM_FUNC_START_LOCAL(create_idmap) * accesses (MMU disabled), invalidate those tables again to * remove any speculatively loaded cache lines. */ + cbnz x19, 0f // skip cache invalidation if MMU is on dmb sy adrp x0, init_idmap_pg_dir adrp x1, init_idmap_pg_end bl dcache_inval_poc - ret x28 +0: ret x28 SYM_FUNC_END(create_idmap) SYM_FUNC_START_LOCAL(create_kernel_mapping)