From patchwork Thu Dec 1 22:56:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Rokosov X-Patchwork-Id: 13061956 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B7903C4332F for ; Thu, 1 Dec 2022 23:33:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Ou3An0yIiIWiX0vkuiLEyzrK7WtCosIjRcFild/yJs0=; b=jyyKDa11z6ctyj hOryzq0no2GkC6bXqKpTpeF1KFdyGDIBi15ikFWiakUSGN28ufr7xQzWaSWsea8PB6e3uuWuoKE89 U8TQhGebTq/cSuV6GNjKRCQk3ujv57TspHseQRUzHA8qtg5lUmNiwXhkBzTI1qZXKX14337+8BM4c ENbT+28+QTOHrYogcraSukmBLyyLqpAsVNV6Of/kczVik1Q9cXiBQFM1yY39Fn5t0pnrgILsbdwg8 CkCS6qcf38FBuk2bLCTJqwfhEXLTqf8rrkYXfP7E5lhu6ZJlhS+I7M7QMSItDH7nMRbfrQpP44cFZ v2Q0a5BjTQNIru45DWaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1p0t2E-00Bhvg-QU; Thu, 01 Dec 2022 23:32:07 +0000 Received: from mx.sberdevices.ru ([45.89.227.171]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1p0sUy-00BSVP-FH; Thu, 01 Dec 2022 22:57:47 +0000 Received: from s-lin-edge02.sberdevices.ru (localhost [127.0.0.1]) by mx.sberdevices.ru (Postfix) with ESMTP id 266CF5FD10; Fri, 2 Dec 2022 01:57:33 +0300 (MSK) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sberdevices.ru; s=mail; t=1669935453; bh=nLy/4b8i+xMemeS4hoDjkYNxHQBeN/nSL76OykbPHmM=; h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type; b=RXK5VNxFeGUkUgpr/1p32w/BEOuGguD/Jkj6QIAutFore0z29ROYG48QCdgVHTy3w GEiFA97xM/JMM9uiq1wA7mE+Six3c4IftH8cuKhO4if13/7XEHS9sC/PVsIsb1zjNC 0XVDuoKap+rzv/FTrHVvbmtr8Ihkraxk+bCficfezNsu3xDZMiNLKMmQjH/qN74PRw jknvsLUqSr0+W8UK1y/CwV32Pi03UchJ/BjjZpH6MrYSMdt49dNtG1Oxww6PnttyCW N8La6v4MrpzzpXRlYgt08hvCCyaUmvpNYWxmGE/4chbVSlvkgPlzhsRDAxoj0vEDXB ysORhjsnCjFsg== Received: from S-MS-EXCH01.sberdevices.ru (S-MS-EXCH01.sberdevices.ru [172.16.1.4]) by mx.sberdevices.ru (Postfix) with ESMTP; Fri, 2 Dec 2022 01:57:33 +0300 (MSK) From: Dmitry Rokosov To: , , , , , , , CC: , , , , , , , , Dmitry Rokosov Subject: [PATCH v8 06/11] clk: meson: introduce a1-clkc common driver for all A1 clock controllers Date: Fri, 2 Dec 2022 01:56:58 +0300 Message-ID: <20221201225703.6507-7-ddrokosov@sberdevices.ru> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20221201225703.6507-1-ddrokosov@sberdevices.ru> References: <20221201225703.6507-1-ddrokosov@sberdevices.ru> MIME-Version: 1.0 X-Originating-IP: [172.16.1.6] X-ClientProxiedBy: S-MS-EXCH02.sberdevices.ru (172.16.1.5) To S-MS-EXCH01.sberdevices.ru (172.16.1.4) X-KSMG-Rule-ID: 4 X-KSMG-Message-Action: clean X-KSMG-AntiSpam-Status: not scanned, disabled by settings X-KSMG-AntiSpam-Interceptor-Info: not scanned X-KSMG-AntiPhishing: not scanned, disabled by settings X-KSMG-AntiVirus: Kaspersky Secure Mail Gateway, version 1.1.2.30, bases: 2022/12/01 20:49:00 #20634374 X-KSMG-AntiVirus-Status: Clean, skipped X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221201_145744_934676_83A95D68 X-CRM114-Status: GOOD ( 20.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Generally, A1 SoC has four clock controllers on the board: PLL, Peripherals, CPU, and Audio. The audio clock controller is different from others, but the rest are very similar from a functional and regmap point of view. So a it's good idea to generalize some routines for all of them. Exactly, meson-a1-clkc driver contains the common probe() flow. Signed-off-by: Dmitry Rokosov --- drivers/clk/meson/Kconfig | 4 ++ drivers/clk/meson/Makefile | 1 + drivers/clk/meson/meson-a1-clkc.c | 63 +++++++++++++++++++++++++++++++ drivers/clk/meson/meson-a1-clkc.h | 25 ++++++++++++ 4 files changed, 93 insertions(+) create mode 100644 drivers/clk/meson/meson-a1-clkc.c create mode 100644 drivers/clk/meson/meson-a1-clkc.h diff --git a/drivers/clk/meson/Kconfig b/drivers/clk/meson/Kconfig index bd44ba47200e..1c885541c3a9 100644 --- a/drivers/clk/meson/Kconfig +++ b/drivers/clk/meson/Kconfig @@ -43,6 +43,10 @@ config COMMON_CLK_MESON_CPU_DYNDIV tristate select COMMON_CLK_MESON_REGMAP +config COMMON_CLK_MESON_A1_CLKC + tristate + select COMMON_CLK_MESON_REGMAP + config COMMON_CLK_MESON8B bool "Meson8 SoC Clock controller support" depends on ARM diff --git a/drivers/clk/meson/Makefile b/drivers/clk/meson/Makefile index 0e6f293c05d4..15136d861a65 100644 --- a/drivers/clk/meson/Makefile +++ b/drivers/clk/meson/Makefile @@ -11,6 +11,7 @@ obj-$(CONFIG_COMMON_CLK_MESON_PLL) += clk-pll.o obj-$(CONFIG_COMMON_CLK_MESON_REGMAP) += clk-regmap.o obj-$(CONFIG_COMMON_CLK_MESON_SCLK_DIV) += sclk-div.o obj-$(CONFIG_COMMON_CLK_MESON_VID_PLL_DIV) += vid-pll-div.o +obj-$(CONFIG_COMMON_CLK_MESON_A1_CLKC) += meson-a1-clkc.o # Amlogic Clock controllers diff --git a/drivers/clk/meson/meson-a1-clkc.c b/drivers/clk/meson/meson-a1-clkc.c new file mode 100644 index 000000000000..2fe320a0e16e --- /dev/null +++ b/drivers/clk/meson/meson-a1-clkc.c @@ -0,0 +1,63 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Amlogic Meson-A1 Clock Controller Driver + * + * Copyright (c) 2022, SberDevices. All Rights Reserved. + * Author: Dmitry Rokosov + */ + +#include +#include "meson-a1-clkc.h" + +static struct regmap_config clkc_regmap_config = { + .reg_bits = 32, + .val_bits = 32, + .reg_stride = 4, +}; + +int meson_a1_clkc_probe(struct platform_device *pdev) +{ + struct meson_a1_clkc_data *clkc; + struct device *dev = &pdev->dev; + struct resource *res; + void __iomem *base; + struct regmap *map; + int clkid, i, err; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!res) + return dev_err_probe(dev, -ENXIO, "can't get IO resource\n"); + + base = devm_ioremap_resource(dev, res); + if (IS_ERR(base)) + return dev_err_probe(dev, PTR_ERR(base), + "can't ioremap resource %pr\n", res); + + map = devm_regmap_init_mmio(dev, base, &clkc_regmap_config); + if (IS_ERR(map)) + return dev_err_probe(dev, PTR_ERR(map), + "can't init regmap mmio region\n"); + + clkc = (struct meson_a1_clkc_data *)of_device_get_match_data(dev); + if (!clkc) + return dev_err_probe(dev, -ENODEV, + "can't get A1 clkc driver data\n"); + + /* Populate regmap for the regmap backed clocks */ + for (i = 0; i < clkc->num_regs; i++) + clkc->regs[i]->map = map; + + for (clkid = 0; clkid < clkc->hw->num; clkid++) { + err = devm_clk_hw_register(dev, clkc->hw->hws[clkid]); + if (err) + return dev_err_probe(dev, err, + "clock registration failed\n"); + } + + return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, + (void *)clkc->hw); +} +EXPORT_SYMBOL_GPL(meson_a1_clkc_probe); + +MODULE_AUTHOR("Dmitry Rokosov "); +MODULE_LICENSE("GPL"); diff --git a/drivers/clk/meson/meson-a1-clkc.h b/drivers/clk/meson/meson-a1-clkc.h new file mode 100644 index 000000000000..503eca0f6cb5 --- /dev/null +++ b/drivers/clk/meson/meson-a1-clkc.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Amlogic Meson-A1 Clock Controller driver + * + * Copyright (c) 2022, SberDevices. All Rights Reserved. + * Author: Dmitry Rokosov + */ + +#ifndef __MESON_A1_CLKC_H__ +#define __MESON_A1_CLKC_H__ + +#include +#include +#include + +#include "clk-regmap.h" + +struct meson_a1_clkc_data { + const struct clk_hw_onecell_data *hw; + struct clk_regmap *const *regs; + size_t num_regs; +}; + +int meson_a1_clkc_probe(struct platform_device *pdev); +#endif