| Message ID | 20221205065756.26875-4-xiangsheng.hou@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MediaTek MT7986 SPI NAND and ECC support | expand |
Il 05/12/22 07:57, Xiangsheng Hou ha scritto: > Add optional nfi_hclk which needed for MT7986. > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> Is there any operation for which you need NFI_HCLK enabled, but at the same time PAD_CLK and/or NFI_CLK can be disabled? If NFI_HCLK and NFI_CLK must always be ON at the same time, adding this clock to spi-mtk-snfi.c is *not* an optimal way of doing things: you can, at this point, set NFI_HCLK as parent of NFI_CLK in the MT7986 clock driver instead, without making any addition to this driver at all. Regards, Angelo
Hi Angelo, On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote: > Il 05/12/22 07:57, Xiangsheng Hou ha scritto: > > Add optional nfi_hclk which needed for MT7986. > > > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> > > Is there any operation for which you need NFI_HCLK enabled, but at > the same time > PAD_CLK and/or NFI_CLK can be disabled? No, for the new IP design on MT7986, will need the PAD_CLK/NFI_CLK/NFI_HCLK enabled at the same time. > If NFI_HCLK and NFI_CLK must always be ON at the same time, adding > this clock to > spi-mtk-snfi.c is *not* an optimal way of doing things: you can, at > this point, > set NFI_HCLK as parent of NFI_CLK in the MT7986 clock driver instead, > without > making any addition to this driver at all. For some IC, there may have only NFI_CLK/PAD_CLK, and have no NFI_HCLK, this rely on IC design. Thanks Xiangsheng Hou
Il 07/12/22 02:42, Xiangsheng Hou (侯祥胜) ha scritto: > Hi Angelo, > > On Mon, 2022-12-05 at 15:21 +0100, AngeloGioacchino Del Regno wrote: >> Il 05/12/22 07:57, Xiangsheng Hou ha scritto: >>> Add optional nfi_hclk which needed for MT7986. >>> >>> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> >> >> Is there any operation for which you need NFI_HCLK enabled, but at >> the same time >> PAD_CLK and/or NFI_CLK can be disabled? > > No, for the new IP design on MT7986, will need the > PAD_CLK/NFI_CLK/NFI_HCLK enabled at the same time. > >> If NFI_HCLK and NFI_CLK must always be ON at the same time, adding >> this clock to >> spi-mtk-snfi.c is *not* an optimal way of doing things: you can, at >> this point, >> set NFI_HCLK as parent of NFI_CLK in the MT7986 clock driver instead, >> without >> making any addition to this driver at all. > > For some IC, there may have only NFI_CLK/PAD_CLK, and have no NFI_HCLK, > this rely on IC design. > I've just checked clk-mt7986-infracfg and we can't reparent NFI1_CK, nor SPINFI1_CK as they have xxxx_sel parents already, which are not common with the HCK. You're right, the addition of the nfi_hclk clock is needed, which means that for this commit, you get my Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> P.S.: Thanks for clarifying! Regards, Angelo
diff --git a/drivers/spi/spi-mtk-snfi.c b/drivers/spi/spi-mtk-snfi.c index 719fc6f53ab1..85644308df23 100644 --- a/drivers/spi/spi-mtk-snfi.c +++ b/drivers/spi/spi-mtk-snfi.c @@ -297,6 +297,7 @@ struct mtk_snand { struct device *dev; struct clk *nfi_clk; struct clk *pad_clk; + struct clk *nfi_hclk; void __iomem *nfi_base; int irq; struct completion op_done; @@ -1339,7 +1340,16 @@ static int mtk_snand_enable_clk(struct mtk_snand *ms) dev_err(ms->dev, "unable to enable pad clk\n"); goto err1; } + ret = clk_prepare_enable(ms->nfi_hclk); + if (ret) { + dev_err(ms->dev, "unable to enable nfi hclk\n"); + goto err2; + } + return 0; + +err2: + clk_disable_unprepare(ms->pad_clk); err1: clk_disable_unprepare(ms->nfi_clk); return ret; @@ -1347,6 +1357,7 @@ static int mtk_snand_enable_clk(struct mtk_snand *ms) static void mtk_snand_disable_clk(struct mtk_snand *ms) { + clk_disable_unprepare(ms->nfi_hclk); clk_disable_unprepare(ms->pad_clk); clk_disable_unprepare(ms->nfi_clk); } @@ -1401,6 +1412,13 @@ static int mtk_snand_probe(struct platform_device *pdev) goto release_ecc; } + ms->nfi_hclk = devm_clk_get_optional(&pdev->dev, "nfi_hclk"); + if (IS_ERR(ms->nfi_hclk)) { + ret = PTR_ERR(ms->nfi_hclk); + dev_err(&pdev->dev, "unable to get nfi_hclk, err = %d\n", ret); + goto release_ecc; + } + ret = mtk_snand_enable_clk(ms); if (ret) goto release_ecc;
Add optional nfi_hclk which needed for MT7986. Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> --- drivers/spi/spi-mtk-snfi.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+)