| Message ID | 20221207055405.30940-16-hayashi.kunihiko@socionext.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | dt-bindings: soc: Introduce UniPhier miscellaneous register blocks and fix examples | expand |
On Wed, 07 Dec 2022 14:54:04 +0900, Kunihiko Hayashi wrote: > Add DT binding schema for components belonging to the platform-specific > DWC3 USB glue layer implemented in UniPhier SoCs. > > This USB glue layer works as a sideband logic for the host controller, > including core reset, vbus control, PHYs, and some signals to the > controller. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > .../socionext,uniphier-dwc3-glue.yaml | 106 ++++++++++++++++++ > 1 file changed, 106 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.example.dtb: usb-glue@65b00000: 'reg' is a required property From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.example.dtb: usb-glue@65b00000: 'hs-phy@200' does not match any of the regexes: '^phy@[0-9a-f]+$', '^regulator@[0-9a-f]+$', '^reset-controller@[0-9a-f]+$', 'pinctrl-[0-9]+' From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.example.dtb: usb-glue@65b00000: 'reg' is a required property From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.example.dtb: usb-glue@65b00000: 'ss-phy@300' does not match any of the regexes: '^phy@[0-9a-f]+$', '^regulator@[0-9a-f]+$', '^reset-controller@[0-9a-f]+$', 'pinctrl-[0-9]+' From schema: /builds/robherring/dt-review-ci/linux/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/project/devicetree-bindings/patch/20221207055405.30940-16-hayashi.kunihiko@socionext.com The base for the series is generally the latest rc1. A different dependency should be noted in *this* patch. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit after running the above command yourself. Note that DT_SCHEMA_FILES can be set to your schema file to speed up checking your schema. However, it must be unset to test all examples with your schema.
On 07/12/2022 06:54, Kunihiko Hayashi wrote: > Add DT binding schema for components belonging to the platform-specific > DWC3 USB glue layer implemented in UniPhier SoCs. > > This USB glue layer works as a sideband logic for the host controller, > including core reset, vbus control, PHYs, and some signals to the > controller. > > Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > --- > .../socionext,uniphier-dwc3-glue.yaml | 106 ++++++++++++++++++ > 1 file changed, 106 insertions(+) > create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml > > diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml > new file mode 100644 > index 000000000000..1b5585a5a3a2 > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml > @@ -0,0 +1,106 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer > + > +maintainers: > + - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> > + > +description: |+ > + DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is > + a sideband logic handling signals to DWC3 host controller inside > + USB3.0 component. > + > +properties: > + compatible: > + items: > + - enum: > + - socionext,uniphier-pro4-dwc3-glue > + - socionext,uniphier-pro5-dwc3-glue > + - socionext,uniphier-pxs2-dwc3-glue > + - socionext,uniphier-ld20-dwc3-glue > + - socionext,uniphier-pxs3-dwc3-glue > + - socionext,uniphier-nx1-dwc3-glue > + - const: simple-mfd > + > + reg: > + maxItems: 1 > + > + '#address-cells': Use consistent quotes - either ' or " > + const: 1 > + > + '#size-cells': > + const: 1 > + > + ranges: true > + > +patternProperties: > + "^reset-controller@[0-9a-f]+$": > + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml# > + > + "^regulator@[0-9a-f]+$": > + $ref: /schemas/regulator/socionext,uniphier-regulator.yaml# > + > + "^phy@[0-9a-f]+$": > + oneOf: > + - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml# > + - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml# > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + You need to fix Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml example. I propose to drop usb-glue@65b00000 from that file. It's not relevant to that example. Best regards, Krzysztof
On 2022/12/08 17:23, Krzysztof Kozlowski wrote: > On 07/12/2022 06:54, Kunihiko Hayashi wrote: >> Add DT binding schema for components belonging to the platform-specific >> DWC3 USB glue layer implemented in UniPhier SoCs. >> >> This USB glue layer works as a sideband logic for the host controller, >> including core reset, vbus control, PHYs, and some signals to the >> controller. >> >> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> >> --- >> .../socionext,uniphier-dwc3-glue.yaml | 106 ++++++++++++++++++ >> 1 file changed, 106 insertions(+) >> create mode 100644 >> Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml >> >> diff --git >> a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml >> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml >> new file mode 100644 >> index 000000000000..1b5585a5a3a2 >> --- /dev/null >> +++ >> b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml >> @@ -0,0 +1,106 @@ >> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) >> +%YAML 1.2 >> +--- >> +$id: >> http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer >> + >> +maintainers: >> + - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> >> + >> +description: |+ >> + DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is >> + a sideband logic handling signals to DWC3 host controller inside >> + USB3.0 component. >> + >> +properties: >> + compatible: >> + items: >> + - enum: >> + - socionext,uniphier-pro4-dwc3-glue >> + - socionext,uniphier-pro5-dwc3-glue >> + - socionext,uniphier-pxs2-dwc3-glue >> + - socionext,uniphier-ld20-dwc3-glue >> + - socionext,uniphier-pxs3-dwc3-glue >> + - socionext,uniphier-nx1-dwc3-glue >> + - const: simple-mfd >> + >> + reg: >> + maxItems: 1 >> + >> + '#address-cells': > > Use consistent quotes - either ' or " I'll change it. >> + const: 1 >> + >> + '#size-cells': >> + const: 1 >> + >> + ranges: true >> + >> +patternProperties: >> + "^reset-controller@[0-9a-f]+$": >> + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml# >> + >> + "^regulator@[0-9a-f]+$": >> + $ref: /schemas/regulator/socionext,uniphier-regulator.yaml# >> + >> + "^phy@[0-9a-f]+$": >> + oneOf: >> + - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml# >> + - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml# >> + >> +required: >> + - compatible >> + - reg >> + >> +additionalProperties: false >> + > > You need to fix > Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml > example. I propose to drop usb-glue@65b00000 from that file. It's not > relevant to that example. I already fixed usb3-phy example in PATCH 6/16, however, it's better to drop the parent node from the example not to avoid the effect of the changes. Thank you, --- Best Regards Kunihiko Hayashi
diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml new file mode 100644 index 000000000000..1b5585a5a3a2 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer + +maintainers: + - Kunihiko Hayashi <hayashi.kunihiko@socionext.com> + +description: |+ + DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is + a sideband logic handling signals to DWC3 host controller inside + USB3.0 component. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-pro4-dwc3-glue + - socionext,uniphier-pro5-dwc3-glue + - socionext,uniphier-pxs2-dwc3-glue + - socionext,uniphier-ld20-dwc3-glue + - socionext,uniphier-pxs3-dwc3-glue + - socionext,uniphier-nx1-dwc3-glue + - const: simple-mfd + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + +patternProperties: + "^reset-controller@[0-9a-f]+$": + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml# + + "^regulator@[0-9a-f]+$": + $ref: /schemas/regulator/socionext,uniphier-regulator.yaml# + + "^phy@[0-9a-f]+$": + oneOf: + - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml# + - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + usb@65b00000 { + compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65b00000 0x400>; + + reset-controller@0 { + compatible = "socionext,uniphier-ld20-usb3-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; + }; + + regulator@100 { + compatible = "socionext,uniphier-ld20-usb3-regulator"; + reg = <0x100 0x10>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; + }; + + phy@200 { + compatible = "socionext,uniphier-ld20-usb3-hsphy"; + reg = <0x200 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 16>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 16>; + }; + + phy@300 { + compatible = "socionext,uniphier-ld20-usb3-ssphy"; + reg = <0x300 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 18>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 18>; + }; + }; +
Add DT binding schema for components belonging to the platform-specific DWC3 USB glue layer implemented in UniPhier SoCs. This USB glue layer works as a sideband logic for the host controller, including core reset, vbus control, PHYs, and some signals to the controller. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> --- .../socionext,uniphier-dwc3-glue.yaml | 106 ++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml