From patchwork Sun Jan 22 08:16:06 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 13111423 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6C5C3C54EB4 for ; Sun, 22 Jan 2023 08:18:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/prwwdZI4bW1QlgNBdeW9+cZt/SPjesXfqkylFSx8pk=; b=xq5a6sObwm/f/Q 53ldF5c96tHzsQWpgPfJ+fGeZiRVo/ev5XySho138AXawx0d/5CK9tankfs4OOUGb6dmx0z5Vm8+I 6IZ/s11HPnSCC2SiqCdjYDxlYngI3I5TDEEVJUO/TTGyDGiilwjXpBIwKQRHaB5R3znekh+ZojpMw QnK6UpQ0fZPKfDf0jez5JyMzccgXeHW7LsPH0SpArecDujJOj3QBuDuw+sB6d6yk9TlJgeeaYJkaV 8SjycePNlVrJvsncsgi1EQHJr9TjXpQ6mxlaD39dZ7ipSwZR7su2coJT1ekgiAw3UDQqO1q1XQ8Ks b0GKlO4K4AOCTSJ5CTrw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJVXi-00F0Z1-SQ; Sun, 22 Jan 2023 08:17:34 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJVXY-00F0Vv-9a for linux-arm-kernel@lists.infradead.org; Sun, 22 Jan 2023 08:17:25 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 30M8GrJx068237; Sun, 22 Jan 2023 02:16:53 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1674375413; bh=mv0hV8ewp95lt3yVu41QLxHIs0FJ5UPFOndlM24JKb4=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=SSGGTw0deoid9ImgiWTAVwv4gbqrtM6vqV8AoM/DF+UJpBDOkpm3DKu4YlJDuTdz/ 6bQCWKmmJI4W3MhPwLM+T21SFYkvcqH2hTb8KAeuzrzlTTVy+Tj+EAx/411dCm61Xw bdic81Na1034MgYhcny1zEz+msgsalRjbhq/UC2U= Received: from DLEE107.ent.ti.com (dlee107.ent.ti.com [157.170.170.37]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 30M8Grmt074821 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 22 Jan 2023 02:16:53 -0600 Received: from DLEE109.ent.ti.com (157.170.170.41) by DLEE107.ent.ti.com (157.170.170.37) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Sun, 22 Jan 2023 02:16:53 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE109.ent.ti.com (157.170.170.41) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Sun, 22 Jan 2023 02:16:53 -0600 Received: from ula0132425.ent.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 30M8GjId079831; Sun, 22 Jan 2023 02:16:50 -0600 From: Vignesh Raghavendra To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Thomas Gleixner , Marc Zyngier CC: , , Vignesh Raghavendra Subject: [RFC PATCH 1/2] irqchip: irq-ti-sci-inta: Don't aggregate MSI events until necessary Date: Sun, 22 Jan 2023 13:46:06 +0530 Message-ID: <20230122081607.959474-2-vigneshr@ti.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230122081607.959474-1-vigneshr@ti.com> References: <20230122081607.959474-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230122_001724_452057_89E5294B X-CRM114-Status: GOOD ( 15.57 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org INTA on K3 SoCs convert DMA global events (MSI) to wired interrupts (VINT). Currently driver maps multiple events to single wired interrupt lines. This makes setting IRQ affinity impossible as migrating wired interrupt to different core will end up migrating all events to that core. Allocate a dedicated VINT for each DMA event request until there are no more VINTs. This creates a 1:1 DMA event to VINT mapping and thus provides unique IRQ line. This will help allocate dedicated IRQs for high performance DMA channels which can thus be mapped to particular CPUs using IRQ affinity. Signed-off-by: Vignesh Raghavendra --- drivers/irqchip/irq-ti-sci-inta.c | 45 +++++++++++++++++-------------- 1 file changed, 25 insertions(+), 20 deletions(-) diff --git a/drivers/irqchip/irq-ti-sci-inta.c b/drivers/irqchip/irq-ti-sci-inta.c index a6ecc53d055c..f1419d24568e 100644 --- a/drivers/irqchip/irq-ti-sci-inta.c +++ b/drivers/irqchip/irq-ti-sci-inta.c @@ -202,7 +202,8 @@ static int ti_sci_inta_xlate_irq(struct ti_sci_inta_irq_domain *inta, * * Return 0 if all went well else corresponding error value. */ -static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain) +static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_domain *domain, + u16 vint_id) { struct ti_sci_inta_irq_domain *inta = domain->host_data; struct ti_sci_inta_vint_desc *vint_desc; @@ -210,11 +211,6 @@ static struct ti_sci_inta_vint_desc *ti_sci_inta_alloc_parent_irq(struct irq_dom struct device_node *parent_node; unsigned int parent_virq; int p_hwirq, ret; - u16 vint_id; - - vint_id = ti_sci_get_free_resource(inta->vint); - if (vint_id == TI_SCI_RESOURCE_NULL) - return ERR_PTR(-EINVAL); p_hwirq = ti_sci_inta_xlate_irq(inta, vint_id); if (p_hwirq < 0) { @@ -328,29 +324,38 @@ static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *d struct ti_sci_inta_vint_desc *vint_desc = NULL; struct ti_sci_inta_event_desc *event_desc; u16 free_bit; + u16 vint_id; mutex_lock(&inta->vint_mutex); - list_for_each_entry(vint_desc, &inta->vint_list, list) { + /* + * Allocate new VINT each time until we runout, then start + * aggregating + */ + vint_id = ti_sci_get_free_resource(inta->vint); + if (vint_id == TI_SCI_RESOURCE_NULL) { + list_for_each_entry(vint_desc, &inta->vint_list, list) { + free_bit = find_first_zero_bit(vint_desc->event_map, + MAX_EVENTS_PER_VINT); + if (free_bit != MAX_EVENTS_PER_VINT) + set_bit(free_bit, vint_desc->event_map); + } + } else { + vint_desc = ti_sci_inta_alloc_parent_irq(domain, vint_id); + if (IS_ERR(vint_desc)) { + event_desc = ERR_CAST(vint_desc); + goto unlock; + } + free_bit = find_first_zero_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT); - if (free_bit != MAX_EVENTS_PER_VINT) { - set_bit(free_bit, vint_desc->event_map); - goto alloc_event; - } + set_bit(free_bit, vint_desc->event_map); } - /* No free bits available. Allocate a new vint */ - vint_desc = ti_sci_inta_alloc_parent_irq(domain); - if (IS_ERR(vint_desc)) { - event_desc = ERR_CAST(vint_desc); + if (free_bit == MAX_EVENTS_PER_VINT) { + event_desc = ERR_PTR(-EINVAL); goto unlock; } - free_bit = find_first_zero_bit(vint_desc->event_map, - MAX_EVENTS_PER_VINT); - set_bit(free_bit, vint_desc->event_map); - -alloc_event: event_desc = ti_sci_inta_alloc_event(vint_desc, free_bit, hwirq); if (IS_ERR(event_desc)) clear_bit(free_bit, vint_desc->event_map);