From patchwork Sun Jan 22 08:16:07 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 13111421 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0EF0CC54E94 for ; Sun, 22 Jan 2023 08:18:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=n6KRqO6HBcmZRJeTmUmPIf7Wq66zhaEO97XZ/UtzC3Y=; b=2vrU2Xv6sm6dUd lW5B76ipv9JpQjgqYyn3mdaEwUgkEzElHdAFsllO1GidGwjaopLAvYyxQNJPcghbCRAR68Dr/Wycx Xfnv/EaMMUEP7a3jQ5ty3gEqtVYK7TTww2SBAXUdTso/F/bk6JUACrjRzYwqSONQnH7WVR9H8jVW3 avwcnKhqO3cWuogO8nnkihuPiBHih0Sf+ejZjNKbU/kdUnHT08vVB7ZGGNLIKxJZ3fQuIGN62YGWz eHQQnVOP3VIrQAF/SPcQ1CJlHqHiJ4L/RLCSnrI3JUAumIXlYI3lAjwSLS0jlOyFN9V/Q02RT+IUr EmMKB9DP/QfaoDFfezaQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJVXQ-00F0WN-HB; Sun, 22 Jan 2023 08:17:16 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pJVXN-00F0Vq-V2 for linux-arm-kernel@lists.infradead.org; Sun, 22 Jan 2023 08:17:15 +0000 Received: from fllv0035.itg.ti.com ([10.64.41.0]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 30M8Gvci039901; Sun, 22 Jan 2023 02:16:57 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1674375417; bh=jJajb1VP2PjMo6TmRNZ2Wj2zpHQ05oS+g9eclveVChc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=zEKXzQnf6mJkyA0cR3OwS+ShNgOm3gMfT/Sa9PDlXNS5taSHFytuFIbxzPvy0jbQF kXYQ/VbJ8pVkiRzbn9c3ucy+my1RY71hDN0Vi9/gKqkRfsTZMiGhCJg/ubcu4cTjh7 f81+FBew0wXGawyDXqQf2qUxlx+xovneCTuYoHwI= Received: from DFLE112.ent.ti.com (dfle112.ent.ti.com [10.64.6.33]) by fllv0035.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 30M8Guq7064961 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Sun, 22 Jan 2023 02:16:57 -0600 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Sun, 22 Jan 2023 02:16:56 -0600 Received: from lelv0327.itg.ti.com (10.180.67.183) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Sun, 22 Jan 2023 02:16:56 -0600 Received: from ula0132425.ent.ti.com (ileaxei01-snat.itg.ti.com [10.180.69.5]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 30M8GjIe079831; Sun, 22 Jan 2023 02:16:53 -0600 From: Vignesh Raghavendra To: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Thomas Gleixner , Marc Zyngier CC: , , Vignesh Raghavendra Subject: [RFC PATCH 2/2] irqchip: irq-ti-sci-inta: Introduce IRQ affinity support Date: Sun, 22 Jan 2023 13:46:07 +0530 Message-ID: <20230122081607.959474-3-vigneshr@ti.com> X-Mailer: git-send-email 2.39.1 In-Reply-To: <20230122081607.959474-1-vigneshr@ti.com> References: <20230122081607.959474-1-vigneshr@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230122_001714_199417_F57EAE6D X-CRM114-Status: GOOD ( 16.97 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for setting IRQ affinity for VINTs which have only one event mapped to them. This just involves changing the parent IRQs affinity (GIC/INTR). Flag VINTs which have affinity configured so as to not aggregate/map more events to such VINTs. Signed-off-by: Vignesh Raghavendra --- drivers/irqchip/irq-ti-sci-inta.c | 39 +++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/drivers/irqchip/irq-ti-sci-inta.c b/drivers/irqchip/irq-ti-sci-inta.c index f1419d24568e..237cb4707cb8 100644 --- a/drivers/irqchip/irq-ti-sci-inta.c +++ b/drivers/irqchip/irq-ti-sci-inta.c @@ -64,6 +64,7 @@ struct ti_sci_inta_event_desc { * @events: Array of event descriptors assigned to this vint. * @parent_virq: Linux IRQ number that gets attached to parent * @vint_id: TISCI vint ID + * @affinity_managed flag to indicate VINT affinity is managed */ struct ti_sci_inta_vint_desc { struct irq_domain *domain; @@ -72,6 +73,7 @@ struct ti_sci_inta_vint_desc { struct ti_sci_inta_event_desc events[MAX_EVENTS_PER_VINT]; unsigned int parent_virq; u16 vint_id; + bool affinity_managed; }; /** @@ -334,6 +336,8 @@ static struct ti_sci_inta_event_desc *ti_sci_inta_alloc_irq(struct irq_domain *d vint_id = ti_sci_get_free_resource(inta->vint); if (vint_id == TI_SCI_RESOURCE_NULL) { list_for_each_entry(vint_desc, &inta->vint_list, list) { + if (vint_desc->affinity_managed) + continue; free_bit = find_first_zero_bit(vint_desc->event_map, MAX_EVENTS_PER_VINT); if (free_bit != MAX_EVENTS_PER_VINT) @@ -434,6 +438,7 @@ static int ti_sci_inta_request_resources(struct irq_data *data) return PTR_ERR(event_desc); data->chip_data = event_desc; + irq_data_update_effective_affinity(data, cpu_online_mask); return 0; } @@ -504,11 +509,45 @@ static void ti_sci_inta_ack_irq(struct irq_data *data) ti_sci_inta_manage_event(data, VINT_STATUS_OFFSET); } +#ifdef CONFIG_SMP +static int ti_sci_inta_set_affinity(struct irq_data *d, + const struct cpumask *mask_val, bool force) +{ + struct ti_sci_inta_event_desc *event_desc; + struct ti_sci_inta_vint_desc *vint_desc; + struct irq_data *parent_irq_data; + + if (cpumask_equal(irq_data_get_effective_affinity_mask(d), mask_val)) + return 0; + + event_desc = irq_data_get_irq_chip_data(d); + if (event_desc) { + vint_desc = to_vint_desc(event_desc, event_desc->vint_bit); + + /* + * Cannot set affinity if there is more than one event + * mapped to same VINT + */ + if (bitmap_weight(vint_desc->event_map, MAX_EVENTS_PER_VINT) > 1) + return -EINVAL; + + vint_desc->affinity_managed = true; + + irq_data_update_effective_affinity(d, mask_val); + parent_irq_data = irq_get_irq_data(vint_desc->parent_virq); + if (parent_irq_data->chip->irq_set_affinity) + return parent_irq_data->chip->irq_set_affinity(parent_irq_data, mask_val, force); + } + + return -EINVAL; +} +#else static int ti_sci_inta_set_affinity(struct irq_data *d, const struct cpumask *mask_val, bool force) { return -EINVAL; } +#endif /** * ti_sci_inta_set_type() - Update the trigger type of the irq.