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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: luhCbWHG0nm4FPoG3l8Ck803Qcsvr2rP0WOlJSjUIwwHQ5AQC11j6lRzTOtOac1iwe8kTSj+6cBal3cnI8puqkxfeQE/lVuBTmao7HeSAUBomzXsGDUNymTllRnz3/YgxBFm3tVd4ZPh3GAFliBMMygXK2ALHbbGVAFTiWw7cH5SFggmJdmnA76GcNRN8plaE7zupCvFZn4Mgp9DsrOxkQzoUa3uGVWFglMMBaPxVN+8BLQIryuwajPuekLLR08bjMiKVjvs3zsLcLLZZLWSea8RwHNVqK5nQiOyUXPg7eVKwGaDIxpF40uoBOps12dj4ynCk5Mmgm5oOfy7L5fgqr0AScJ7mPUBQtZB+iPNQ+O+QuwX9Xl6w1rXVc61HCrtKgv1GCAuFJbjOtKXDZ8tKlRz2lWnq3ukoXCfR/g86ncjpYeLyuo4JuNDCfPaJ+WsLdKyjacgMVyMjM7ImImeXrOyNjU3d0RlClDs0y4wwhc0yDbisLlmZyljmLagF79eYCAGjcbVDs8RcjmYWk4NbxEXHU0l8D7k9cT1EmhetFTB5CapTA28ARqhS5DFs7GC+8XBPFnot8C3Z97xvlpIiGAgkGH4Mts8hGC/FIRsv/fzNqAfH10HxtE4/Uy7FGuxk6FyNYFlUupvuNiLLPWlIXkFwCqZm71weu5+CAZ/hoEq4zyLuhSrR3n51d6pqr2/gl36h7PDObVqiKrC0SYYqY3OL8ojruAYsLwZLvbVrGTlLxhFTQewSfN/pSH7uluWd5y80petIFzxiRTeNGr3gUWRYJBGUI263b1SPEqNIxmxSyV+GhHIJFT5Db+t1j+0O25n04wegJwJyCCmQNZuwSopFWUq+T8P7NKF7GLNRJe/gbAdAqL6wTABT1lglFuKeJjEmkYNuiEy+/rKcRvZQ/Jrv7UiO1v8RnH07hi4uCWIlUFxXy8FfQgV9ZK6mg1wT3YHvpGRuFr297xEGsn3YUK2fR2/Q74GWDQjBcTByw9qLas6gGyQvKb61CNOVTBaegGqpdntRGQD1WseKCej2jBixUTxbxgRr4zTEWaw+A3CPUYsQ1/eczgmiyQEMTafiH0XVpTUG2c7n5X7OHbVKO11WlejcbTtMYTkAFF+2j6DBizrd8lcEaB69DZhxX0P5lqoToiaxHEmZD8obW0ZZnUmnznnwVcUre3RouMzHmkhVvgY1pdi+J4rxt+LhYb/KKErARWm5W6ZGTfFVvNeePBCcKF/c0VzXi9btoVwCBbfpiPDfSsVTj2rDSBZEXJlJ2jIUi59bYvpHfGw2Cyl//4S5jTdy0Utk01Ng24kJohZnrWXiUfBz9r4uslPkt6Ob2da1ZMbFVHSkvDHtqGpJrRwLTB/cr1p7gF3swoyvzViP5h980Au8YNvjN/yuYRb+9KaDrkQYm3YfAoEcDr7YvrisokeHstziA9w4dJg4D+R1wjtjoQSZSmBtXL/seg2dmMPWS16F6NlLPzO2rDDaoyuWFCEMFB4KG8cxCG2nfijQQP/DO4efjLJNmhns/pTktPjPgYA1CqaMZ6UYWZwq7FhujO1HYVfBFxOyGE01pPZg1Lnz7kw0eGR5eqtgdQY X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 78dce08b-8365-4d9b-e9e0-08db00e23fc9 X-MS-Exchange-CrossTenant-AuthSource: AM7PR04MB7046.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Jan 2023 03:46:33.7582 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5cxr2ii8SMzpRK8BpS4HMZ7CFtMBmTJxgg9rQn5FlG+I5ccf9wH2rTEH2+4/eHz/TQ7SMc9S8k9a9ybJYp2lhA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PAXPR04MB9203 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230127_194635_451053_1A49B47C X-CRM114-Status: GOOD ( 21.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org NXP i.MX93 mediamix blk-ctrl contains one DISPLAY_MUX register which configures parallel display format by using the "PARALLEL_DISP_FORMAT" field. Add a DRM bridge driver to support the display format configuration. Signed-off-by: Liu Ying --- drivers/gpu/drm/bridge/imx/Kconfig | 8 + drivers/gpu/drm/bridge/imx/Makefile | 1 + drivers/gpu/drm/bridge/imx/imx93-pdfc.c | 209 ++++++++++++++++++++++++ 3 files changed, 218 insertions(+) create mode 100644 drivers/gpu/drm/bridge/imx/imx93-pdfc.c diff --git a/drivers/gpu/drm/bridge/imx/Kconfig b/drivers/gpu/drm/bridge/imx/Kconfig index 608f47f41bcd..adbd75a924d1 100644 --- a/drivers/gpu/drm/bridge/imx/Kconfig +++ b/drivers/gpu/drm/bridge/imx/Kconfig @@ -44,4 +44,12 @@ config DRM_IMX8QXP_PIXEL_LINK_TO_DPI Choose this to enable pixel link to display pixel interface(PXL2DPI) found in Freescale i.MX8qxp processor. +config DRM_IMX93_PARALLEL_DISP_FMT_CONFIG + tristate "NXP i.MX93 parallel display format configuration" + depends on OF + select DRM_KMS_HELPER + help + Choose this to enable parallel display format configuration + found in NXP i.MX93 processor. + endif # ARCH_MXC || COMPILE_TEST diff --git a/drivers/gpu/drm/bridge/imx/Makefile b/drivers/gpu/drm/bridge/imx/Makefile index aa90ec8d5433..e88821733770 100644 --- a/drivers/gpu/drm/bridge/imx/Makefile +++ b/drivers/gpu/drm/bridge/imx/Makefile @@ -7,3 +7,4 @@ obj-$(CONFIG_DRM_IMX8QXP_LDB) += imx8qxp-ldb.o obj-$(CONFIG_DRM_IMX8QXP_PIXEL_COMBINER) += imx8qxp-pixel-combiner.o obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK) += imx8qxp-pixel-link.o obj-$(CONFIG_DRM_IMX8QXP_PIXEL_LINK_TO_DPI) += imx8qxp-pxl2dpi.o +obj-$(CONFIG_DRM_IMX93_PARALLEL_DISP_FMT_CONFIG) += imx93-pdfc.o diff --git a/drivers/gpu/drm/bridge/imx/imx93-pdfc.c b/drivers/gpu/drm/bridge/imx/imx93-pdfc.c new file mode 100644 index 000000000000..a891b1f6743a --- /dev/null +++ b/drivers/gpu/drm/bridge/imx/imx93-pdfc.c @@ -0,0 +1,209 @@ +// SPDX-License-Identifier: GPL-2.0+ + +/* + * Copyright 2022,2023 NXP + */ + +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#define DRIVER_NAME "imx93_pdfc" + +#define DISPLAY_MUX 0x60 +#define PARALLEL_DISP_FORMAT 0x700 + +enum imx93_pdfc_format { + RGB888_TO_RGB888 = 0x0, + RGB888_TO_RGB666 = 0x1 << 8, + RGB565_TO_RGB565 = 0x2 << 8, +}; + +struct imx93_pdfc { + struct drm_bridge bridge; + struct drm_bridge *next_bridge; + struct device *dev; + struct regmap *regmap; + u32 format; +}; + +static int imx93_pdfc_bridge_attach(struct drm_bridge *bridge, + enum drm_bridge_attach_flags flags) +{ + struct imx93_pdfc *pdfc = bridge->driver_private; + + return drm_bridge_attach(bridge->encoder, pdfc->next_bridge, bridge, flags); +} + +static void +imx93_pdfc_bridge_atomic_enable(struct drm_bridge *bridge, + struct drm_bridge_state *old_bridge_state) +{ + struct imx93_pdfc *pdfc = bridge->driver_private; + + regmap_update_bits(pdfc->regmap, DISPLAY_MUX, PARALLEL_DISP_FORMAT, + pdfc->format); +} + +static const u32 imx93_pdfc_bus_output_fmts[] = { + MEDIA_BUS_FMT_RGB888_1X24, + MEDIA_BUS_FMT_RGB666_1X18, + MEDIA_BUS_FMT_RGB565_1X16, + MEDIA_BUS_FMT_FIXED +}; + +static bool imx93_pdfc_bus_output_fmt_supported(u32 fmt) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(imx93_pdfc_bus_output_fmts); i++) { + if (imx93_pdfc_bus_output_fmts[i] == fmt) + return true; + } + + return false; +} + +static u32 * +imx93_pdfc_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state, + u32 output_fmt, + unsigned int *num_input_fmts) +{ + u32 *input_fmts; + + if (!imx93_pdfc_bus_output_fmt_supported(output_fmt)) + return NULL; + + input_fmts = kmalloc(sizeof(*input_fmts), GFP_KERNEL); + if (!input_fmts) + return NULL; + + switch (output_fmt) { + case MEDIA_BUS_FMT_RGB888_1X24: + case MEDIA_BUS_FMT_RGB565_1X16: + input_fmts[0] = output_fmt; + break; + case MEDIA_BUS_FMT_RGB666_1X18: + case MEDIA_BUS_FMT_FIXED: + input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24; + break; + } + + *num_input_fmts = 1; + + return input_fmts; +} + +static int imx93_pdfc_bridge_atomic_check(struct drm_bridge *bridge, + struct drm_bridge_state *bridge_state, + struct drm_crtc_state *crtc_state, + struct drm_connector_state *conn_state) +{ + struct imx93_pdfc *pdfc = bridge->driver_private; + + switch (bridge_state->output_bus_cfg.format) { + case MEDIA_BUS_FMT_RGB888_1X24: + pdfc->format = RGB888_TO_RGB888; + break; + case MEDIA_BUS_FMT_RGB666_1X18: + pdfc->format = RGB888_TO_RGB666; + break; + case MEDIA_BUS_FMT_RGB565_1X16: + pdfc->format = RGB565_TO_RGB565; + break; + default: + DRM_DEV_DEBUG_DRIVER(pdfc->dev, "Unsupported output bus format: 0x%x\n", + bridge_state->output_bus_cfg.format); + return -EINVAL; + } + + return 0; +} + +static const struct drm_bridge_funcs imx93_pdfc_bridge_funcs = { + .attach = imx93_pdfc_bridge_attach, + .atomic_enable = imx93_pdfc_bridge_atomic_enable, + .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, + .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, + .atomic_get_input_bus_fmts = imx93_pdfc_bridge_atomic_get_input_bus_fmts, + .atomic_check = imx93_pdfc_bridge_atomic_check, + .atomic_reset = drm_atomic_helper_bridge_reset, +}; + +static int imx93_pdfc_bridge_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct imx93_pdfc *pdfc; + int ret; + + pdfc = devm_kzalloc(dev, sizeof(*pdfc), GFP_KERNEL); + if (!pdfc) + return -ENOMEM; + + pdfc->regmap = syscon_node_to_regmap(dev->of_node->parent); + if (IS_ERR(pdfc->regmap)) { + ret = PTR_ERR(pdfc->regmap); + if (ret != -EPROBE_DEFER) + DRM_DEV_ERROR(dev, "failed to get regmap: %d\n", ret); + return ret; + } + + pdfc->next_bridge = devm_drm_of_get_bridge(dev, dev->of_node, 1, 0); + if (IS_ERR(pdfc->next_bridge)) { + ret = PTR_ERR(pdfc->next_bridge); + if (ret != -EPROBE_DEFER) + DRM_DEV_ERROR(dev, "failed to get next bridge: %d\n", ret); + return ret; + } + + platform_set_drvdata(pdev, pdfc); + + pdfc->dev = dev; + pdfc->bridge.driver_private = pdfc; + pdfc->bridge.funcs = &imx93_pdfc_bridge_funcs; + pdfc->bridge.of_node = dev->of_node; + + drm_bridge_add(&pdfc->bridge); + + return 0; +} + +static int imx93_pdfc_bridge_remove(struct platform_device *pdev) +{ + struct imx93_pdfc *pdfc = platform_get_drvdata(pdev); + + drm_bridge_remove(&pdfc->bridge); + + return 0; +} + +static const struct of_device_id imx93_pdfc_dt_ids[] = { + { .compatible = "nxp,imx93-pdfc", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, imx93_pdfc_dt_ids); + +static struct platform_driver imx93_pdfc_bridge_driver = { + .probe = imx93_pdfc_bridge_probe, + .remove = imx93_pdfc_bridge_remove, + .driver = { + .of_match_table = imx93_pdfc_dt_ids, + .name = DRIVER_NAME, + }, +}; +module_platform_driver(imx93_pdfc_bridge_driver); + +MODULE_DESCRIPTION("NXP i.MX93 parallel display format configuration driver"); +MODULE_AUTHOR("Liu Ying "); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:" DRIVER_NAME);