| Message ID | 20230129170136.14506-1-laurent.pinchart@ideasonboard.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: freescale: imx8mm-phyboard: Add I2C4 pinmuxing | expand |
Hello Laurent, thank you for your patch. Am Sonntag, dem 29.01.2023 um 19:01 +0200 schrieb Laurent Pinchart: > The I2C4 bus is exposed on the camera connector. Add and select the > corresponding pinmux entries and set the default frequency. The > device > is left disabled, to be enabled from camera overlays. > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > --- > .../dts/freescale/imx8mm-phyboard-polis-rdk.dts | 13 > +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis- > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > index 4a3df2b77b0b..17521bb911c2 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > @@ -168,6 +168,12 @@ &gpio5 { > "", "ECSPI1_SS0"; > }; > > +&i2c4 { > + clock-frequency = <400000>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pinctrl_i2c4>; > +}; > + > /* PCIe */ > &pcie0 { > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > @@ -336,6 +342,13 @@ MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x16 > >; > }; > > + pinctrl_i2c4: i2c4grp { > + fsl,pins = < > + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400 > 001c3 Bit 0 of the IOMUXC_SW_PAD_CTL_PAD registers is reserved. Can you change this in not setting the bit? > + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400 > 001c3 Same here. Thanks, Teresa > + >; > + }; > + > pinctrl_leds: leds1grp { > fsl,pins = < > MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16
Hi Teresa, On Mon, Jan 30, 2023 at 08:57:16AM +0000, Teresa Remmet wrote: > Hello Laurent, > > thank you for your patch. > > Am Sonntag, dem 29.01.2023 um 19:01 +0200 schrieb Laurent Pinchart: > > The I2C4 bus is exposed on the camera connector. Add and select the > > corresponding pinmux entries and set the default frequency. The device > > is left disabled, to be enabled from camera overlays. > > > > Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > --- > > .../dts/freescale/imx8mm-phyboard-polis-rdk.dts | 13 +++++++++++++ > > 1 file changed, 13 insertions(+) > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis- > > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > > index 4a3df2b77b0b..17521bb911c2 100644 > > --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > > @@ -168,6 +168,12 @@ &gpio5 { > > "", "ECSPI1_SS0"; > > }; > > > > +&i2c4 { > > + clock-frequency = <400000>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pinctrl_i2c4>; > > +}; > > + > > /* PCIe */ > > &pcie0 { > > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > > @@ -336,6 +342,13 @@ MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x16 > > >; > > }; > > > > + pinctrl_i2c4: i2c4grp { > > + fsl,pins = < > > + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 > > Bit 0 of the IOMUXC_SW_PAD_CTL_PAD registers is reserved. Can you > change this in not setting the bit? > > > + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 > > Same here. Good point. I see you've fixed it recently in your BSP ;-) I'll fix this patch and resubmit. > > + >; > > + }; > > + > > pinctrl_leds: leds1grp { > > fsl,pins = < > > MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16
Hello Laurent, Am Donnerstag, dem 16.02.2023 um 01:28 +0200 schrieb Laurent Pinchart: > Hi Teresa, > > On Mon, Jan 30, 2023 at 08:57:16AM +0000, Teresa Remmet wrote: > > Hello Laurent, > > > > thank you for your patch. > > > > Am Sonntag, dem 29.01.2023 um 19:01 +0200 schrieb Laurent Pinchart: > > > The I2C4 bus is exposed on the camera connector. Add and select > > > the > > > corresponding pinmux entries and set the default frequency. The > > > device > > > is left disabled, to be enabled from camera overlays. > > > > > > Signed-off-by: Laurent Pinchart < > > > laurent.pinchart@ideasonboard.com> > > > --- > > > .../dts/freescale/imx8mm-phyboard-polis-rdk.dts | 13 > > > +++++++++++++ > > > 1 file changed, 13 insertions(+) > > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis- > > > rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis- > > > rdk.dts > > > index 4a3df2b77b0b..17521bb911c2 100644 > > > --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > > > +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts > > > @@ -168,6 +168,12 @@ &gpio5 { > > > "", "ECSPI1_SS0"; > > > }; > > > > > > +&i2c4 { > > > + clock-frequency = <400000>; > > > + pinctrl-names = "default"; > > > + pinctrl-0 = <&pinctrl_i2c4>; > > > +}; > > > + > > > /* PCIe */ > > > &pcie0 { > > > assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, > > > @@ -336,6 +342,13 @@ MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x16 > > > >; > > > }; > > > > > > + pinctrl_i2c4: i2c4grp { > > > + fsl,pins = < > > > + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0 > > > x400001c3 > > > > Bit 0 of the IOMUXC_SW_PAD_CTL_PAD registers is reserved. Can you > > change this in not setting the bit? > > > > > + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0 > > > x400001c3 > > > > Same here. > > Good point. I see you've fixed it recently in your BSP ;-) I'll fix > this > patch and resubmit. Ha, you catched me :). Yes, your patch was the reason I fixed it there. Thanks for the v2. Teresa > > > > + >; > > > + }; > > > + > > > pinctrl_leds: leds1grp { > > > fsl,pins = < > > > MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts index 4a3df2b77b0b..17521bb911c2 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-phyboard-polis-rdk.dts @@ -168,6 +168,12 @@ &gpio5 { "", "ECSPI1_SS0"; }; +&i2c4 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c4>; +}; + /* PCIe */ &pcie0 { assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>, @@ -336,6 +342,13 @@ MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x16 >; }; + pinctrl_i2c4: i2c4grp { + fsl,pins = < + MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 + MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 + >; + }; + pinctrl_leds: leds1grp { fsl,pins = < MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x16
The I2C4 bus is exposed on the camera connector. Add and select the corresponding pinmux entries and set the default frequency. The device is left disabled, to be enabled from camera overlays. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> --- .../dts/freescale/imx8mm-phyboard-polis-rdk.dts | 13 +++++++++++++ 1 file changed, 13 insertions(+)