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[90.63.244.31]) by smtp.gmail.com with ESMTPSA id s5-20020a5d5105000000b002bdfcd8c77csm11426785wrt.101.2023.01.30.02.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Jan 2023 02:26:37 -0800 (PST) From: Alexandre Bailon To: yong.wu@mediatek.com, joro@8bytes.org, will@kernel.org Cc: robin.murphy@arm.com, matthias.bgg@gmail.com, krzysztof.kozlowski@linaro.org, robh+dt@kernel.org, iommu@lists.linux.dev, linux-mediatek@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Alexandre Bailon Subject: [PATCH 1/3] dt-bindings: memory: mediatek: Add support of unmanaged iommu domain Date: Mon, 30 Jan 2023 11:27:20 +0100 Message-Id: <20230130102722.133271-2-abailon@baylibre.com> X-Mailer: git-send-email 2.38.2 In-Reply-To: <20230130102722.133271-1-abailon@baylibre.com> References: <20230130102722.133271-1-abailon@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230130_022639_384186_79A686A4 X-CRM114-Status: GOOD ( 11.51 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently, the only way to have an unmanaged domain for a device is having a dedicated iova region or bank. This adds a new bit to MTK_M4U_ID that allows defining devices that needs unmanaged iommu domain. Signed-off-by: Alexandre Bailon Reviewed-by: Alexandre Mergnat --- include/dt-bindings/memory/mtk-memory-port.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/dt-bindings/memory/mtk-memory-port.h b/include/dt-bindings/memory/mtk-memory-port.h index 2f68a0511a257..86896c776691a 100644 --- a/include/dt-bindings/memory/mtk-memory-port.h +++ b/include/dt-bindings/memory/mtk-memory-port.h @@ -7,11 +7,14 @@ #define __DT_BINDINGS_MEMORY_MTK_MEMORY_PORT_H_ #define MTK_LARB_NR_MAX 32 +#define MTK_UNMANAGED_DEVICE (1 << 31) #define MTK_M4U_ID(larb, port) (((larb) << 5) | (port)) #define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0x1f) #define MTK_M4U_TO_PORT(id) ((id) & 0x1f) +#define MTK_M4U_UNMANAGED(id) ((id) & MTK_UNMANAGED_DEVICE) #define MTK_IFAIOMMU_PERI_ID(port) MTK_M4U_ID(0, port) +#define MTK_M4U_UNMANAGED_ID(larb, port) (MTK_M4U_ID(larb, port) | MTK_UNMANAGED_DEVICE) #endif