From patchwork Wed Feb 8 06:56:37 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 13132504 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 4971AC636CC for ; Wed, 8 Feb 2023 06:59:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=zeWPpvd+G1QXQhWL1VZIvNnJijCs7v9EqwLWcGvtOK0=; b=Ju+nZOaaqkYNq5 DjhNnejm9kbwo9X0+Pph9DXT1w9FahA6HX/aJntMH2civO0m7H9RHswBPRgmYdlPAJ/kd3FYnXoky WFLDrUhjqF10A5qAaSykIjJXH6qZgNp0z4lfYTbKINpyFpwe9PuaLXJXLXxkaqnFDdm/AtEB7i6DT D/m+dfokWEjZTgQ3tuZ7IS3+x4Rdspe7QE0ca1Wak9iYS/10SRt6SDSDN2nvmrJILjTstSUlWc0ak 9hVZdP92XA5Od87sWO3R0CiqJv0sczS/fjs+3Y+loTEQI/uDZq54DMopTR9yakoTKtSdxpUAu+2bk hPYNDcXfg35yhPTDZcew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPePA-00ELi6-Sg; Wed, 08 Feb 2023 06:58:09 +0000 Received: from mout.perfora.net ([74.208.4.196]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pPeOU-00ELTT-Rj for linux-arm-kernel@lists.infradead.org; Wed, 08 Feb 2023 06:57:28 +0000 Received: from toolbox.int.toradex.com ([213.55.227.109]) by mrelay.perfora.net (mreueus002 [74.208.5.2]) with ESMTPSA (Nemesis) id 0MEXsd-1pNEcn4BTd-00Ffwu; Wed, 08 Feb 2023 07:57:17 +0100 From: Marcel Ziswiler To: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Liu Ying , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, Krzysztof Kozlowski , Joakim Zhang , Marcel Ziswiler , Fabio Estevam , Krzysztof Kozlowski , Pengutronix Kernel Team , Rob Herring , Sascha Hauer , Shawn Guo Subject: [PATCH v7 06/10] arm64: dts: imx8qm: add can node in devicetree Date: Wed, 8 Feb 2023 07:56:37 +0100 Message-Id: <20230208065641.23544-7-marcel@ziswiler.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20230208065641.23544-1-marcel@ziswiler.com> References: <20230208065641.23544-1-marcel@ziswiler.com> MIME-Version: 1.0 X-Provags-ID: V03:K1:xHL40s+pKmz3N6B3E2W9qdvg/v0R7m/3H+ntD2+MZ3mS7/c8K2N jYKbFByFmjAPlhJjyyK3FsiNqgZfUNZcDI1k1lfF61jNxX8ZTeF3pjTbpE6GToMapRPPpAk hFeacNQJhQBf88GIakxZk6MeWLJkL0znLxAQQG4NDmQcD5KJVp6K81q+XfQ80LQrycSYI0I x9cIP9PKRB2EadKIOe8eA== UI-OutboundReport: notjunk:1;M01:P0:V857Eo3TwnI=;aLAZyCtGMsW392yh7HRdIDLe2FJ eJt35NZvhiwahgVhIE5dQABhjOeakw5q5XCl30pp4lb21B96edxeKpkBLsZtlyjeebnxBLIda TcjTBaLQ8j4QRrkP6YeQXXu1G0KHg0Eh3wdmaH/5evyeoFOXmCCs9jALfD8Tnzt9wWLgiiTzh o4Fvyjs9gZY6i3eWYhYyU6JgHTMrMte7oYgrXMDIDgZkR+01zoz7WsONQvbaTlnYvCe7rZBWv p8pPYRNe1Vu69we1dFGzSvhO+P0QOgaEW3pA/vRpesD/df3bHz8WlplOx+/PyvP5fRCu3ueED UFAUPA3o/tZpjgOuPcWfOF4RU1/JPzHkBXdWezpPo0v+2pm6SCLbkSpROpeEA9msmrWyHN0i7 eaC0EgX/LTEQio2St2VUYH1MDxWbjemvLgoF+DuA70tKRALOlgU7SCK8Gc53Li1gYRdBccLni zgtrmHKrRIp6gRpCbSuvmN5AJa8zpmi2DkZZLUzbsENz7tHPROTneQbAV1cacNiOp4EjlWu7f nnWFxB2M+MZI8JLMZNqmV7NMd+S+AM9EmflhueHZr7xjPDci9LUvVIqnp417uPAF1Sozov3QS baX1+F4CAmNCgepzaOQ4MPQoPyFxHkb2frLWxC0IFcfcFGCXrG27USBFZ9iOdsonwT/rgeQUF QeXHrVzKvvHMXDSDWVZyiE5xLALKhcp+IgGRYzK8TA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230207_225727_015868_BA92A7B9 X-CRM114-Status: UNSURE ( 9.16 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Joakim Zhang Add CAN node for imx8qm in devicetree. Unlike on the i.MX 8QXP where the flexcan clocks are shared between multiple CAN instances, the i.MX 8QM has separate flexcan clock slices. Signed-off-by: Joakim Zhang Signed-off-by: Marcel Ziswiler --- (no changes since v5) Changes in v5: - Update subject prefix as pointed out by Krzysztof. Thanks! Changes in v4: - New patch inspired by the following downstream patch: commit 117607e6a7b5 ("arm64: dts: imx8qm: add CAN node in devicetree") .../boot/dts/freescale/imx8qm-ss-dma.dtsi | 44 +++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi index bbe5f5ecfb92..e9b198c13b2f 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-dma.dtsi @@ -16,6 +16,50 @@ uart4_lpcg: clock-controller@5a4a0000 { "uart4_lpcg_ipg_clk"; power-domains = <&pd IMX_SC_R_UART_4>; }; + + can1_lpcg: clock-controller@5ace0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5ace0000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>, + <&dma_ipg_clk>, <&dma_ipg_clk>; + clock-indices = , , ; + clock-output-names = "can1_lpcg_pe_clk", + "can1_lpcg_ipg_clk", + "can1_lpcg_chi_clk"; + power-domains = <&pd IMX_SC_R_CAN_1>; + }; + + can2_lpcg: clock-controller@5acf0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5acf0000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>, + <&dma_ipg_clk>, <&dma_ipg_clk>; + clock-indices = , , ; + clock-output-names = "can2_lpcg_pe_clk", + "can2_lpcg_ipg_clk", + "can2_lpcg_chi_clk"; + power-domains = <&pd IMX_SC_R_CAN_2>; + }; +}; + +&flexcan1 { + fsl,clk-source = /bits/ 8 <1>; +}; + +&flexcan2 { + clocks = <&can1_lpcg 1>, + <&can1_lpcg 0>; + assigned-clocks = <&clk IMX_SC_R_CAN_1 IMX_SC_PM_CLK_PER>; + fsl,clk-source = /bits/ 8 <1>; +}; + +&flexcan3 { + clocks = <&can2_lpcg 1>, + <&can2_lpcg 0>; + assigned-clocks = <&clk IMX_SC_R_CAN_2 IMX_SC_PM_CLK_PER>; + fsl,clk-source = /bits/ 8 <1>; }; &lpuart0 {