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Tue, 14 Feb 2023 06:10:17 -0800 (PST) Received: from A13PC04R.einet.ad.eivd.ch ([193.134.219.72]) by smtp.googlemail.com with ESMTPSA id n11-20020a1709065e0b00b008b13814f804sm332241eju.186.2023.02.14.06.10.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Feb 2023 06:10:17 -0800 (PST) From: Rick Wertenbroek To: alberto.dassatti@heig-vd.ch Cc: xxm@rock-chips.com, rick.wertenbroek@heig-vd.ch, Rick Wertenbroek , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Shawn Lin , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?= =?utf-8?q?ski?= , Bjorn Helgaas , Jani Nikula , Greg Kroah-Hartman , Rodrigo Vivi , Mikko Kovanen , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH v2 9/9] PCI: rockchip: Add parameter check for RK3399 PCIe endpoint core set_msi() Date: Tue, 14 Feb 2023 15:08:57 +0100 Message-Id: <20230214140858.1133292-10-rick.wertenbroek@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230214140858.1133292-1-rick.wertenbroek@gmail.com> References: <20230214140858.1133292-1-rick.wertenbroek@gmail.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230214_061018_266882_60A5F2BB X-CRM114-Status: GOOD ( 14.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The RK3399 PCIe endpoint core supports only a single PCIe physcial function (function number 0), therefore return -EINVAL if set_msi() is called with a function number greater than 0. The PCIe standard only allows the multi message capability (MMC) value to be up to 0x5 (32 messages), therefore return -EINVAL if set_msi() is called with a MMC value of over 0x5. Signed-off-by: Rick Wertenbroek --- drivers/pci/controller/pcie-rockchip-ep.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/pci/controller/pcie-rockchip-ep.c b/drivers/pci/controller/pcie-rockchip-ep.c index b7865a94e..80634b690 100644 --- a/drivers/pci/controller/pcie-rockchip-ep.c +++ b/drivers/pci/controller/pcie-rockchip-ep.c @@ -294,6 +294,16 @@ static int rockchip_pcie_ep_set_msi(struct pci_epc *epc, u8 fn, u8 vfn, struct rockchip_pcie *rockchip = &ep->rockchip; u32 flags; + if (fn) { + dev_err(&epc->dev, "This endpoint controller only supports a single physical function\n"); + return -EINVAL; + } + + if (mmc > 0x5) { + dev_err(&epc->dev, "Number of MSI IRQs cannot be more than 32\n"); + return -EINVAL; + } + flags = rockchip_pcie_read(rockchip, ROCKCHIP_PCIE_EP_FUNC_BASE(fn) + ROCKCHIP_PCIE_EP_MSI_CTRL_REG);