Message ID | 20230220023320.3499-4-clin@suse.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Series |
Add pinctrl support for S32 SoC family
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expand
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diff --git a/MAINTAINERS b/MAINTAINERS index 39ff1a717625..e427d7af88fb 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16562,6 +16562,14 @@ S: Supported F: drivers/gpio/gpio-sama5d2-piobu.c F: drivers/pinctrl/pinctrl-at91* +PIN CONTROLLER - NXP S32 +M: Chester Lin <clin@suse.com> +R: NXP S32 Linux Team <s32@nxp.com> +L: linux-gpio@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/pinctrl/nxp,s32* +F: drivers/pinctrl/nxp/ + PIN CONTROLLER - QUALCOMM M: Bjorn Andersson <andersson@kernel.org> L: linux-arm-msm@vger.kernel.org
Add myself as a maintainer and add NXP S32 Linux Team as a review group for S32 pinctrl patches. Signed-off-by: Chester Lin <clin@suse.com> --- (No change in v5) Changes in v4: - The initial version in this series. MAINTAINERS | 8 ++++++++ 1 file changed, 8 insertions(+)