From patchwork Wed Mar 8 13:45:39 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Singh Tomar X-Patchwork-Id: 13165867 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6932FC64EC4 for ; Wed, 8 Mar 2023 13:47:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=lMIo3q72/+QYEnzH3FI5r0Jh0/U6WqP10Yc48d9PpKs=; b=jbPxbs5+mx5SyO SAf+wD7/9b3h2XG0Xij17pKOA9cnalgfxSEzbUjsemMfp6Lxzf9fCPqe+HO8AVRVL8PCP/RuuQ/Vc 48PjfVQBCjTZPYhVIt7LR+fliPVarRSbWQhumqY0s0LQxTLjAdnD9qNXgCFO+nyd/qD4O9XbHM3QW cQnHL+V1QBXjBOxUcmSHVfXG8rKhvwyBPhPNye8K9U0W/p3ibed6kvFh0E1W12bs655XiI/0cfduf Pb+ymHKWmggwDGI9LcP6GiQy+F/hGkHZZ5NhaIcXQ6zUZH4hhvoxW5bjV1W0wkKmCJuby9pKu3A8L DVdZ/6wq5ZItsSlLdrRA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pZu89-005GwY-OJ; Wed, 08 Mar 2023 13:46:57 +0000 Received: from mx0b-0016f401.pphosted.com ([67.231.156.173]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pZu7f-005GiT-3w for linux-arm-kernel@lists.infradead.org; Wed, 08 Mar 2023 13:46:28 +0000 Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 3286q82V010666; Wed, 8 Mar 2023 05:46:23 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0220; bh=Q2SLMOAvrX4eGuNg9m/pACRH52WAnII4Y1udF5kpKVI=; b=j3qlSPQ8YXUEPOwwW/3mtdAOKuKv2Jkl443MOZZHPepxqF0DvHPG3j9u+MWdTn8fQkhj YtqqOCKn3HM4n7biaHFSdYYskNflCnCYSFpGhENiXCNvL3hQImar0EnouZfCJXtIGE1c lSmdfBFeiDCnlMmtRVHTrAOyvolRBkpiS5Q8fdu5ZlXfNC/6c4dT0jAKz4DagBzio9z3 0G4vMh/rVQUKohiFqw6pLcIr3xX727DYnzmghrFXJhDh75SImWzKB1Io8lxS8MWiGgIw 16ehAVjKYS663K6YWYeZNdJKbi+JiiTRH70saxmkSrqKYlqYKCJ4bYYZSKMx4iOstO7Z Mg== Received: from dc5-exch02.marvell.com ([199.233.59.182]) by mx0b-0016f401.pphosted.com (PPS) with ESMTPS id 3p6ff3bcrf-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 08 Mar 2023 05:46:23 -0800 Received: from DC5-EXCH02.marvell.com (10.69.176.39) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Wed, 8 Mar 2023 05:46:21 -0800 Received: from maili.marvell.com (10.69.176.80) by DC5-EXCH02.marvell.com (10.69.176.39) with Microsoft SMTP Server id 15.0.1497.42 via Frontend Transport; Wed, 8 Mar 2023 05:46:21 -0800 Received: from localhost.localdomain (unknown [10.28.36.167]) by maili.marvell.com (Postfix) with ESMTP id 700475B692D; Wed, 8 Mar 2023 05:46:19 -0800 (PST) From: Amit Singh Tomar To: CC: , , , Amit Singh Tomar Subject: [RFC 2/2] arm_mpam: add support for MSMON_MBWU_L/CAPTURE Date: Wed, 8 Mar 2023 19:15:39 +0530 Message-ID: <20230308134539.3071034-3-amitsinght@marvell.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230308134539.3071034-1-amitsinght@marvell.com> References: <20230308134539.3071034-1-amitsinght@marvell.com> MIME-Version: 1.0 X-Proofpoint-ORIG-GUID: fguJ3-w2u5GJG3_T00xHSnQSWrZLjqYE X-Proofpoint-GUID: fguJ3-w2u5GJG3_T00xHSnQSWrZLjqYE X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-08_08,2023-03-08_03,2023-02-09_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230308_054627_314275_91EB7B77 X-CRM114-Status: GOOD ( 22.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In MPAM v0.1 and from MPAM v1.1, There is an optional long monitor register, MSMON_MBWU_L/CAPTURE, that contains a count of 44 bits or 63 bits Capture register MSMON_MBWU_CAPTURE that is loaded from the monitor register each time the selected capture event occurs. When a capture event occurs, the monitor register is copied to the capture register Signed-off-by: Amit Singh Tomar Change-Id: I0c7bb8d57a2f77e45b06df0529a5bf1624f66f77 --- drivers/platform/mpam/mpam_devices.c | 54 +++++++++++++++++++++++---- drivers/platform/mpam/mpam_internal.h | 15 ++++++-- 2 files changed, 59 insertions(+), 10 deletions(-) diff --git a/drivers/platform/mpam/mpam_devices.c b/drivers/platform/mpam/mpam_devices.c index 130e5997d336..22318730ef60 100644 --- a/drivers/platform/mpam/mpam_devices.c +++ b/drivers/platform/mpam/mpam_devices.c @@ -649,6 +649,10 @@ static void mpam_ris_hw_probe(struct mpam_msc_ris *ris) props->num_mbwu_mon = FIELD_GET(MPAMF_MBWUMON_IDR_NUM_MON, mbwumonidr); if (props->num_mbwu_mon) mpam_set_feature(mpam_feat_msmon_mbwu, props); + + msc->mbwu_has_capture = FIELD_GET(MPAMF_MBWUMON_IDR_HAS_CAPTURE, mbwumonidr); + msc->mbwu_has_long = FIELD_GET(MPAMF_MBWUMON_IDR_HAS_LONG, mbwumonidr); + msc->mbwu_lwd = FIELD_GET(MPAMF_MBWUMON_IDR_HAS_LWD, mbwumonidr); } } @@ -811,7 +815,8 @@ static void write_msmon_ctl_flt_vals(struct mon_read *m, u32 ctl_val, mpam_write_monsel_reg(msc, CFG_MBWU_FLT, flt_val); mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val); mpam_write_monsel_reg(msc, MBWU, 0); - mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val|MSMON_CFG_x_CTL_EN); + mpam_write_monsel_reg(msc, CFG_MBWU_CTL, ctl_val|MSMON_CFG_x_CTL_EN| + MSMON_CFG_x_CTL_CAPT_EVNT); mbwu_state = &m->ris->mbwu_state[m->ctx->mon]; if (mbwu_state) @@ -841,7 +846,7 @@ static void __ris_msmon_read(void *arg) struct mpam_msc_ris *ris = m->ris; struct mpam_msc *msc = m->ris->msc; struct msmon_mbwu_state *mbwu_state; - u32 mon_sel, ctl_val, flt_val, cur_ctl, cur_flt; + u32 mon_sel, ctl_val, flt_val, cur_ctl, cur_flt, now_low; spin_lock_irqsave(&msc->mon_sel_lock, flags); mon_sel = FIELD_PREP(MSMON_CFG_MON_SEL_MON_SEL, ctx->mon) | @@ -875,12 +880,47 @@ static void __ris_msmon_read(void *arg) now = FIELD_GET(MSMON___VALUE, now); break; case mpam_feat_msmon_mbwu: - now = mpam_read_monsel_reg(msc, MBWU); - nrdy = now & MSMON___NRDY; - now = FIELD_GET(MSMON___VALUE, now); + /* If the monitor is a counter monitor such as MBWU, + * implementation should clear the nrdy bit, either + * doing explicit software write to clear NRDY bit or + * a capture event that automatically clear the nrdy + * bit, let's use the latter one. + * MSMON_MBWU_CAPTURE/L_CAPTURE is written atomically by + * copying all bits from MSMON_MBWU_L when the capture + * event that is programmed into the configuration of this + * monitor instance occurs. + */ + mpam_write_monsel_reg(msc, CAPT_EVNT, 0x1); - if (nrdy) - break; + if (msc->mbwu_has_long && msc->mbwu_has_capture && + msc->mbwu_lwd) { + now = mpam_read_monsel_reg(msc, MBWU_L + 4); + nrdy = now & MSMON___NRDY; + if (nrdy) + break; + + now = mpam_read_monsel_reg(msc, MBWU_CAPTURE_L + 4); + now_low = mpam_read_monsel_reg(msc, MBWU_CAPTURE_L); + now = MSMON_MBWU_L_VALUE & (now << 32 | now_low); + } else if (msc->mbwu_has_long && msc->mbwu_has_capture && + !msc->mbwu_lwd) { + now = mpam_read_monsel_reg(msc, MBWU_L + 4); + nrdy = now & MSMON___NRDY; + if (nrdy) + break; + + now = mpam_read_monsel_reg(msc, MBWU_CAPTURE_L + 4); + now_low = mpam_read_monsel_reg(msc, MBWU_CAPTURE_L); + now = MSMON_MBWU_L_VALUE_LWD & (now << 32 | now_low); + } else { + now = mpam_read_monsel_reg(msc, MBWU); + nrdy = now & MSMON___NRDY; + if (nrdy) + break; + + now = mpam_read_monsel_reg(msc, MBWU_CAPTURE); + now = FIELD_GET(MSMON___VALUE, now); + } if (!mbwu_state) break; diff --git a/drivers/platform/mpam/mpam_internal.h b/drivers/platform/mpam/mpam_internal.h index d4bf14601db7..f75020eb318b 100644 --- a/drivers/platform/mpam/mpam_internal.h +++ b/drivers/platform/mpam/mpam_internal.h @@ -35,6 +35,9 @@ struct mpam_msc u32 nrdy_usec; cpumask_t accessibility; bool has_extd_esr; + bool mbwu_has_capture; + bool mbwu_has_long; + bool mbwu_lwd; int reenable_error_ppi; struct mpam_msc * __percpu *error_dev_id; @@ -328,6 +331,8 @@ void mpam_resctrl_exit(void); #define MSMON_CSU_CAPTURE 0x0848 /* last cache-usage value captured */ #define MSMON_MBWU 0x0860 /* current mem-bw usage value */ #define MSMON_MBWU_CAPTURE 0x0868 /* last mem-bw value captured */ +#define MSMON_MBWU_L 0x0880 /* current mem-bw usage value, LONG version*/ +#define MSMON_MBWU_CAPTURE_L 0x0890 /* last mem-bw value captured, LONG version */ #define MSMON_CAPT_EVNT 0x0808 /* signal a capture event */ #define MPAMF_ESR 0x00F8 /* error status register */ #define MPAMF_ECR 0x00F0 /* error control register */ @@ -384,6 +389,9 @@ void mpam_resctrl_exit(void); /* MPAMF_MBWUMON_IDR - MPAM memory bandwidth usage monitor ID register */ #define MPAMF_MBWUMON_IDR_NUM_MON GENMASK(15, 0) #define MPAMF_MBWUMON_IDR_HAS_CAPTURE BIT(31) +#define MPAMF_MBWUMON_IDR_HAS_LWD BIT(29) +#define MPAMF_MBWUMON_IDR_HAS_LONG BIT(30) + /* MPAMF_PARTID_NRW_IDR - MPAM PARTID narrowing ID register */ #define MPAMF_PARTID_NRW_IDR_INTPARTID_MAX GENMASK(15, 0) @@ -525,9 +533,10 @@ void mpam_resctrl_exit(void); * MSMON_MBWU_CAPTURE - Memory system performance monitor memory bandwidth usage * capture register */ -#define MSMON___VALUE GENMASK(30, 0) -#define MSMON___NRDY BIT(31) -#define MSMON_MBWU_L_VALUE GENMASK(62, 0) +#define MSMON___VALUE GENMASK(30, 0) +#define MSMON___NRDY BIT(31) +#define MSMON_MBWU_L_VALUE GENMASK(62, 0) +#define MSMON_MBWU_L_VALUE_LWD GENMASK(43, 0) /* * MSMON_CAPT_EVNT - Memory system performance monitoring capture event * generation register