diff mbox series

[v1,14/14] arm64: dts: imx8mq-librem5: Add 166MHz to DDRC OPP table

Message ID 20230309204608.237605-15-martin.kepplinger@puri.sm (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mq-librem5: updates and fixes until march 2023 | expand

Commit Message

Martin Kepplinger March 9, 2023, 8:46 p.m. UTC 
From: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>

This is the lowest frequency supported by older iMX8MQ SoC
revisions.

Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm>
---
 arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
index 35bde8d41e8e7..ceced6bc4e898 100644
--- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
@@ -329,6 +329,10 @@  opp-100000000 {
 			opp-hz = /bits/ 64 <100000000>;
 		};
 
+		opp-166000000 {
+			opp-hz = /bits/ 64 <166935483>;
+		};
+
 		opp-800000000 {
 			opp-hz = /bits/ 64 <800000000>;
 		};