From patchwork Wed Mar 15 11:31:59 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Etienne Carriere X-Patchwork-Id: 13175683 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F512C6FD1D for ; Wed, 15 Mar 2023 11:33:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=RYj8xwKChEEbZsIaCWu9YeckAu/bCImIOvthefx7jd8=; b=mbKz15muo91JhE EljscjeN7AHABmgu/FmaYyanAmcL+6V/GQ1zHsK0SbD7BinfZ4/p/IeA7co/S065KNB0gTLUd5+2p FfDA7AbCBDyGXwAx8c3gi7VXHYgyvtAE6rTyNCBG8nin2iZF2A2iI4xc6vevPYVnKggjVUWpEurL/ lNLaRvWMidFZ7cvMH9jq7cl3ucu+MciMPtm7JB1vXUcGAksTJXT7gC9YcFNlIMPaXK36hGNTwVOLY zmg0HRV7OF5iAzNdVqRR/5URwDcS835qjk9ivUbJuMdC2ERcAiIW4ekwNd/6CISTB26BMMXfgh2rM 7PqHQdru6MQ2v8r4P8Nw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pcPMb-00DCFa-2x; Wed, 15 Mar 2023 11:32:13 +0000 Received: from mail-ed1-x534.google.com ([2a00:1450:4864:20::534]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pcPMY-00DCDE-2i for linux-arm-kernel@lists.infradead.org; Wed, 15 Mar 2023 11:32:12 +0000 Received: by mail-ed1-x534.google.com with SMTP id fd5so40278779edb.7 for ; Wed, 15 Mar 2023 04:32:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1678879926; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:from:to:cc:subject:date:message-id:reply-to; bh=uJIPBS8b/IYdR4MkxApb1rcmpblReO8/5hZw+mD6UJE=; b=X9LPWl7Pb9C642Yw4iaoa1AZ5rYTdPMk6OA9tgeICQR7HthDyZgJxaUjxTyu/tKLmW DzNloFI2QUJ46vblYORd8i4VOpYMBefgjd19+YWrOIBbBFIjj0I9xqntS/2uSAEaqd+z 53NP4K1F7y6hERBCcILUTncdCsSB/saafrlYSTIWMhNSF+yi52SUQ5b31KAHWQwLABQ+ 4a+ES+yNiqJ/1QPc+6KNIZp3Df1HNdDIgZEu7fd3lXxVmaVAaekAYolwp9igQgVP/Kl0 ITeHhMQv6gIajMMRRbsVMNkMRbFLz01ROk/QrPT5MMRml6bsbm5HgtFzCMksnBQeOni4 Pk5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; t=1678879926; h=content-transfer-encoding:mime-version:message-id:date:subject:cc :to:from:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=uJIPBS8b/IYdR4MkxApb1rcmpblReO8/5hZw+mD6UJE=; b=sME1QNISadi948H6HhNY4nLBahISmbkhaJ9NCv+nYBpIxFcwVeER8wFZhI3Rd/W1Xt VdZYw+mcr5S0MpGGTBlXJ6oeKANjokFSYVttO7IloBsHlfHqKoFmUzgfMkgroJ7UZQw0 /0Dr8FNL/w4brbjQqKo3wTDeikE1yJRZDygBWEh5mTZIHrDJD8NVLGvgHGZBQpHONcPW c4xVu0Y507P6yG+oQhFzprIo5NdWOLdb3untLh7Ejzm88qXdDrtmwDxJxg/8uqXH8lxB jELLJxbcJ33EBIgwAdBXYSdNcLGz0JPJyrnwV9eF+jZUqhB2gnOJWg+7xpZCKdOZlOQi 1yuw== X-Gm-Message-State: AO0yUKVKDKp0r70EkHSXVcH7ELXqBQ3TBxyhc6hBNaS4g/VNekGOypwD so+hBYa7DKvxznGhANjutVH4jg== X-Google-Smtp-Source: AK7set84sKeemJG3TVXCoAn4ULR4rtw94ThipVDY2A+00vI2G6z4JpG26lUn9i2MCSEXCu0UVWwtEw== X-Received: by 2002:aa7:dc17:0:b0:4fd:2363:16f2 with SMTP id b23-20020aa7dc17000000b004fd236316f2mr2051972edu.37.1678879926592; Wed, 15 Mar 2023 04:32:06 -0700 (PDT) Received: from lmecxl1178.lme.st.com ([2a04:cec0:1008:2d39:4d4b:ab19:bc3b:a0cd]) by smtp.gmail.com with ESMTPSA id 1-20020a508e41000000b004fb95f51f54sm2264151edx.12.2023.03.15.04.32.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Mar 2023 04:32:06 -0700 (PDT) From: Etienne Carriere To: linux-kernel@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Etienne Carriere , Jens Wiklander , Krzysztof Kozlowski , Marc Zyngier , Rob Herring , Sumit Garg , Pascal Paillet Subject: [PATCH v3 1/3] dt-bindings: arm: optee: add interrupt controller properties Date: Wed, 15 Mar 2023 12:31:59 +0100 Message-Id: <20230315113201.1343781-1-etienne.carriere@linaro.org> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230315_043210_883807_E7591080 X-CRM114-Status: GOOD ( 15.78 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Adds an optional interrupt controller property to optee firmware node in the DT bindings. Optee driver may embeds an irqchip exposing OP-TEE interrupt events notified by the TEE world. Optee registers up to 1 interrupt controller and identifies each line with a line number from 0 to UINT16_MAX. The identifiers and meaning of the interrupt line number are specific to the platform and shall be found in the OP-TEE platform documentation. In the example shown in optee DT binding documentation, the platform SCMI device controlled by Linux scmi driver uses optee interrupt irq 5 as signal to trigger processing of an asynchronous incoming SCMI message in the scope of a CPU DVFS control. A platform can have several SCMI channels driven this way. Optee irqs also permit small embedded devices to share e.g. a gpio expander, a group of wakeup sources, etc... between OP-TEE world (for sensitive services) and Linux world (for non-sensitive services). The physical controller is driven from the TEE which exposes some controls to Linux kernel. Cc: Jens Wiklander Cc: Krzysztof Kozlowski Cc: Marc Zyngier Cc: Rob Herring Cc: Sumit Garg Co-developed-by: Pascal Paillet Signed-off-by: Pascal Paillet Signed-off-by: Etienne Carriere --- Changes since v2: - Added a sentence on optee irq line number values and meaning, in DT binding doc and commit message. - Updated example in DT binding doc from comment, fixed misplaced interrupt-parent property and removed gic and sram shm nodes. Changes since v1: - Added a description to #interrupt-cells property. - Changed of example. Linux wakeup event was subject to discussion and i don't know much about input events in Linux. So move to SCMI. In the example, an SCMI server in OP-TEE world raises optee irq 5 so that Linux scmi optee channel &scmi_cpu_dvfs pushed in the incoming SCMI message in the scmi device for liekly later processing in threaded context. The example includes all parties: optee, scmi, sram, gic. - Obviously rephrased the commit message. --- .../arm/firmware/linaro,optee-tz.yaml | 38 +++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml index d4dc0749f9fd..ff7e1292c803 100644 --- a/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml +++ b/Documentation/devicetree/bindings/arm/firmware/linaro,optee-tz.yaml @@ -40,6 +40,16 @@ properties: HVC #0, register assignments register assignments are specified in drivers/tee/optee/optee_smc.h + interrupt-controller: true + + "#interrupt-cells": + const: 1 + description: | + OP-TEE exposes irq for irp chip controllers from OP-TEE world. Each + irq is assigned a single line number identifier used as first argument. + Line number identifiers and their meaning shall be found in the OP-TEE + firmware platform documentation. + required: - compatible - method @@ -64,3 +74,31 @@ examples: method = "hvc"; }; }; + + - | + #include + firmware { + optee: optee { + compatible = "linaro,optee-tz"; + method = "smc"; + interrupt-parent = <&gic>; + interrupts = ; + interrupt-controller; + #interrupt-cells = <1>; + }; + + scmi { + compatible = "linaro,scmi-optee"; + linaro,optee-channel-id = <0>; + shmem = <&scmi_shm_tx>, <&scmi_shm_rx>; + interrupts-extended = <&optee 5>; + interrupt-names = "a2p"; + #address-cells = <1>; + #size-cells = <0>; + + scmi_cpu_dvfs: protocol@13 { + reg = <0x13>; + #clock-cells = <1>; + }; + }; + };