From patchwork Mon Mar 27 11:59:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Pierre Gondois X-Patchwork-Id: 13189101 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 303C3C7619A for ; Mon, 27 Mar 2023 12:01:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=23Mp0IzRGXCd70WiZBG8Pcwavjb0o7TFJZ6DI4wr52M=; b=kwDMfvdmblJPUk 7JF4oATncKYP7FR2vcjYCy//tn9VkfFBgDu0NwFUL9sS67MngzKbKqAgkGKrbWIfsMSCItbWJeylt oG4T7a5S7YbHY+zS8gCI0/hbxOLUIY5ddx6cST3+k85jSSQvOhf3Lo8AhyuUb6k4L6oFbjIMOlduV ktujqO+By99p6k5PQ6uGoAqhV3mxQ5XTAMKGfO7pL7Or12ttqUaSSSeSQWoGtkBtOiJuaN/BPd2Id /7Koujul5kHpgv5NDc9cJ+necvCV5rXBmrEPQ+MK5OtMp+8f6uQr2mWfHg1YpQ1IeHcCM44JDpE8X nCQT4jC/Ap016nuok8qA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pglWe-00AoYi-0k; Mon, 27 Mar 2023 12:00:36 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pglWZ-00AoXK-1V for linux-arm-kernel@lists.infradead.org; Mon, 27 Mar 2023 12:00:33 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 559A1FEC; Mon, 27 Mar 2023 05:01:13 -0700 (PDT) Received: from pierre123.arm.com (unknown [10.57.19.133]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 72C6C3F663; Mon, 27 Mar 2023 05:00:26 -0700 (PDT) From: Pierre Gondois To: linux-kernel@vger.kernel.org Cc: Radu Rendec , Pierre Gondois , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , "Rafael J. Wysocki" , Sudeep Holla , Akihiko Odaki , Palmer Dabbelt , Gavin Shan , Jeremy Linton , linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/3] cacheinfo: Check cache properties are present in DT Date: Mon, 27 Mar 2023 13:59:50 +0200 Message-Id: <20230327115953.788244-3-pierre.gondois@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230327115953.788244-1-pierre.gondois@arm.com> References: <20230327115953.788244-1-pierre.gondois@arm.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230327_050031_553605_60B29157 X-CRM114-Status: GOOD ( 14.94 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org If a Device Tree (DT) is used, the presence of cache properties is assumed. Not finding any is not considered. For arm64 platforms, cache information can be fetched from the clidr_el1 register. Checking whether cache information is available in the DT allows to switch to using clidr_el1. init_of_cache_level() \-of_count_cache_leaves() will assume there a 2 cache leaves (L1 data/instruction caches), which can be different from clidr_el1 information. cache_setup_of_node() tries to read cache properties in the DT. If there are none, this is considered a success. Knowing no information was available would allow to switch to using clidr_el1. Signed-off-by: Pierre Gondois Reported-by: Alexandre Ghiti --- drivers/base/cacheinfo.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c index 4ca117574af1..5b0edf2d5da8 100644 --- a/drivers/base/cacheinfo.c +++ b/drivers/base/cacheinfo.c @@ -78,6 +78,9 @@ bool last_level_cache_is_shared(unsigned int cpu_x, unsigned int cpu_y) } #ifdef CONFIG_OF + +static bool of_check_cache_nodes(struct device_node *np); + /* OF properties to query for a given cache type */ struct cache_type_info { const char *size_prop; @@ -205,6 +208,11 @@ static int cache_setup_of_node(unsigned int cpu) return -ENOENT; } + if (!of_check_cache_nodes(np)) { + of_node_put(np); + return -ENOENT; + } + prev = np; while (index < cache_leaves(cpu)) { @@ -229,6 +237,25 @@ static int cache_setup_of_node(unsigned int cpu) return 0; } +static bool of_check_cache_nodes(struct device_node *np) +{ + struct device_node *next; + + if (of_property_read_bool(np, "cache-size") || + of_property_read_bool(np, "i-cache-size") || + of_property_read_bool(np, "d-cache-size") || + of_property_read_bool(np, "cache-unified")) + return true; + + next = of_find_next_cache_node(np); + if (next) { + of_node_put(next); + return true; + } + + return false; +} + static int of_count_cache_leaves(struct device_node *np) { unsigned int leaves = 0; @@ -260,6 +287,9 @@ int init_of_cache_level(unsigned int cpu) struct device_node *prev = NULL; unsigned int levels = 0, leaves, level; + if (!of_check_cache_nodes(np)) + goto err_out; + leaves = of_count_cache_leaves(np); if (leaves > 0) levels = 1;