| Message ID | 20230329111422.3693-2-mike.leach@linaro.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | perf: cs-etm: Update perf to handle new Coresight Trace ID | expand |
Em Wed, Mar 29, 2023 at 12:14:20PM +0100, Mike Leach escreveu: > The information to associate Trace ID and CPU will be changing. > > Drivers will start outputting this as a hardware ID packet in the data > file which if present will be used in preference to the AUXINFO values. CC /tmp/build/perf-tools-next/util/symbol-elf.o LD /tmp/build/perf-tools-next/util/cs-etm-decoder/perf-in.o util/cs-etm.c: In function ‘cs_etm__process_auxtrace_info_full’: util/cs-etm.c:2866:26: error: unused variable ‘inode’ [-Werror=unused-variable] 2866 | struct int_node *inode; | ^~~~~ cc1: all warnings being treated as errors make[4]: *** [/var/home/acme/git/perf-tools-next/tools/build/Makefile.build:97: /tmp/build/perf-tools-next/util/cs-etm.o] Error 1 make[4]: *** Waiting for unfinished jobs.... gmake[3]: *** [/var/home/acme/git/perf-tools-next/tools/build/Makefile.build:140: util] Err Trying to fix... > To prepare for this we provide a helper functions to do the individual ID > mapping, and one to extract the IDs from the completed metadata blocks. > > Signed-off-by: Mike Leach <mike.leach@linaro.org> > Reviewed-by: James Clark <james.clark@arm.com> > Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> > --- > tools/include/linux/coresight-pmu.h | 5 ++ > tools/perf/util/cs-etm.c | 91 +++++++++++++++++++---------- > tools/perf/util/cs-etm.h | 14 ++++- > 3 files changed, 77 insertions(+), 33 deletions(-) > > diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h > index 6c2fd6cc5a98..db9c7c0abb6a 100644 > --- a/tools/include/linux/coresight-pmu.h > +++ b/tools/include/linux/coresight-pmu.h > @@ -7,9 +7,14 @@ > #ifndef _LINUX_CORESIGHT_PMU_H > #define _LINUX_CORESIGHT_PMU_H > > +#include <linux/bits.h> > + > #define CORESIGHT_ETM_PMU_NAME "cs_etm" > #define CORESIGHT_ETM_PMU_SEED 0x10 > > +/* CoreSight trace ID is currently the bottom 7 bits of the value */ > +#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0) > + > /* > * Below are the definition of bit offsets for perf option, and works as > * arbitrary values for all ETM versions. > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c > index f65bac5ddbdb..f6ca07f68b25 100644 > --- a/tools/perf/util/cs-etm.c > +++ b/tools/perf/util/cs-etm.c > @@ -196,6 +196,30 @@ int cs_etm__get_pid_fmt(u8 trace_chan_id, u64 *pid_fmt) > return 0; > } > > +static int cs_etm__map_trace_id(u8 trace_chan_id, u64 *cpu_metadata) > +{ > + struct int_node *inode; > + > + /* Get an RB node for this CPU */ > + inode = intlist__findnew(traceid_list, trace_chan_id); > + > + /* Something went wrong, no need to continue */ > + if (!inode) > + return -ENOMEM; > + > + /* > + * The node for that CPU should not be taken. > + * Back out if that's the case. > + */ > + if (inode->priv) > + return -EINVAL; > + > + /* All good, associate the traceID with the metadata pointer */ > + inode->priv = cpu_metadata; > + > + return 0; > +} > + > void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq, > u8 trace_chan_id) > { > @@ -2804,6 +2828,36 @@ static bool cs_etm__has_virtual_ts(u64 **metadata, int num_cpu) > return true; > } > > +/* map trace ids to correct metadata block, from information in metadata */ > +static int cs_etm__map_trace_ids_metadata(int num_cpu, u64 **metadata) > +{ > + u64 cs_etm_magic; > + u8 trace_chan_id; > + int i, err; > + > + for (i = 0; i < num_cpu; i++) { > + cs_etm_magic = metadata[i][CS_ETM_MAGIC]; > + switch (cs_etm_magic) { > + case __perf_cs_etmv3_magic: > + trace_chan_id = (u8)((metadata[i][CS_ETM_ETMTRACEIDR]) & > + CORESIGHT_TRACE_ID_VAL_MASK); > + break; > + case __perf_cs_etmv4_magic: > + case __perf_cs_ete_magic: > + trace_chan_id = (u8)((metadata[i][CS_ETMV4_TRCTRACEIDR]) & > + CORESIGHT_TRACE_ID_VAL_MASK); > + break; > + default: > + /* unknown magic number */ > + return -EINVAL; > + } > + err = cs_etm__map_trace_id(trace_chan_id, metadata[i]); > + if (err) > + return err; > + } > + return 0; > +} > + > int cs_etm__process_auxtrace_info_full(union perf_event *event, > struct perf_session *session) > { > @@ -2814,7 +2868,7 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > int event_header_size = sizeof(struct perf_event_header); > int total_size = auxtrace_info->header.size; > int priv_size = 0; > - int num_cpu, trcidr_idx; > + int num_cpu; > int err = 0; > int i, j; > u64 *ptr = NULL; > @@ -2853,23 +2907,13 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > cs_etm__create_meta_blk(ptr, &i, > CS_ETM_PRIV_MAX, > CS_ETM_NR_TRC_PARAMS_V0); > - > - /* The traceID is our handle */ > - trcidr_idx = CS_ETM_ETMTRACEIDR; > - > } else if (ptr[i] == __perf_cs_etmv4_magic) { > metadata[j] = > cs_etm__create_meta_blk(ptr, &i, > CS_ETMV4_PRIV_MAX, > CS_ETMV4_NR_TRC_PARAMS_V0); > - > - /* The traceID is our handle */ > - trcidr_idx = CS_ETMV4_TRCTRACEIDR; > } else if (ptr[i] == __perf_cs_ete_magic) { > metadata[j] = cs_etm__create_meta_blk(ptr, &i, CS_ETE_PRIV_MAX, -1); > - > - /* ETE shares first part of metadata with ETMv4 */ > - trcidr_idx = CS_ETMV4_TRCTRACEIDR; > } else { > ui__error("CS ETM Trace: Unrecognised magic number %#"PRIx64". File could be from a newer version of perf.\n", > ptr[i]); > @@ -2881,26 +2925,6 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > err = -ENOMEM; > goto err_free_metadata; > } > - > - /* Get an RB node for this CPU */ > - inode = intlist__findnew(traceid_list, metadata[j][trcidr_idx]); > - > - /* Something went wrong, no need to continue */ > - if (!inode) { > - err = -ENOMEM; > - goto err_free_metadata; > - } > - > - /* > - * The node for that CPU should not be taken. > - * Back out if that's the case. > - */ > - if (inode->priv) { > - err = -EINVAL; > - goto err_free_metadata; > - } > - /* All good, associate the traceID with the metadata pointer */ > - inode->priv = metadata[j]; > } > > /* > @@ -2994,6 +3018,11 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > if (err) > goto err_delete_thread; > > + /* before aux records are queued, need to map metadata to trace IDs */ > + err = cs_etm__map_trace_ids_metadata(num_cpu, metadata); > + if (err) > + goto err_delete_thread; > + > err = cs_etm__queue_aux_records(session); > if (err) > goto err_delete_thread; > diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h > index 98a4f7113d2f..6d3078e042b4 100644 > --- a/tools/perf/util/cs-etm.h > +++ b/tools/perf/util/cs-etm.h > @@ -29,13 +29,17 @@ enum { > /* > * Update the version for new format. > * > - * New version 1 format adds a param count to the per cpu metadata. > + * Version 1: format adds a param count to the per cpu metadata. > * This allows easy adding of new metadata parameters. > * Requires that new params always added after current ones. > * Also allows client reader to handle file versions that are different by > * checking the number of params in the file vs the number expected. > + * > + * Version 2: Drivers will use PERF_RECORD_AUX_OUTPUT_HW_ID to output > + * CoreSight Trace ID. ...TRACEIDR metadata will be set to unused ID. > */ > -#define CS_HEADER_CURRENT_VERSION 1 > +#define CS_HEADER_CURRENT_VERSION 2 > +#define CS_AUX_HW_ID_VERSION_MIN 2 > > /* Beginning of header common to both ETMv3 and V4 */ > enum { > @@ -97,6 +101,12 @@ enum { > CS_ETE_PRIV_MAX > }; > > +/* > + * Check for valid CoreSight trace ID. If an invalid value is present in the metadata, > + * then IDs are present in the hardware ID packet in the data file. > + */ > +#define CS_IS_VALID_TRACE_ID(id) ((id > 0) && (id < 0x70)) > + > /* > * ETMv3 exception encoding number: > * See Embedded Trace Macrocell specification (ARM IHI 0014Q) > -- > 2.32.0 >
Em Wed, Mar 29, 2023 at 09:41:08AM -0300, Arnaldo Carvalho de Melo escreveu: > Em Wed, Mar 29, 2023 at 12:14:20PM +0100, Mike Leach escreveu: > > The information to associate Trace ID and CPU will be changing. > > > > Drivers will start outputting this as a hardware ID packet in the data > > file which if present will be used in preference to the AUXINFO values. > > CC /tmp/build/perf-tools-next/util/symbol-elf.o > LD /tmp/build/perf-tools-next/util/cs-etm-decoder/perf-in.o > util/cs-etm.c: In function ‘cs_etm__process_auxtrace_info_full’: > util/cs-etm.c:2866:26: error: unused variable ‘inode’ [-Werror=unused-variable] > 2866 | struct int_node *inode; > | ^~~~~ > cc1: all warnings being treated as errors > make[4]: *** [/var/home/acme/git/perf-tools-next/tools/build/Makefile.build:97: /tmp/build/perf-tools-next/util/cs-etm.o] Error 1 > make[4]: *** Waiting for unfinished jobs.... > gmake[3]: *** [/var/home/acme/git/perf-tools-next/tools/build/Makefile.build:140: util] Err > > Trying to fix... Seems simple, the variable isn't used at all, so I added: diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index f6ca07f68b251274..5fc9c288080b4526 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -2863,7 +2863,6 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, { struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info; struct cs_etm_auxtrace *etm = NULL; - struct int_node *inode; struct perf_record_time_conv *tc = &session->time_conv; int event_header_size = sizeof(struct perf_event_header); int total_size = auxtrace_info->header.size; > > To prepare for this we provide a helper functions to do the individual ID > > mapping, and one to extract the IDs from the completed metadata blocks. > > > > Signed-off-by: Mike Leach <mike.leach@linaro.org> > > Reviewed-by: James Clark <james.clark@arm.com> > > Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> > > --- > > tools/include/linux/coresight-pmu.h | 5 ++ > > tools/perf/util/cs-etm.c | 91 +++++++++++++++++++---------- > > tools/perf/util/cs-etm.h | 14 ++++- > > 3 files changed, 77 insertions(+), 33 deletions(-) > > > > diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h > > index 6c2fd6cc5a98..db9c7c0abb6a 100644 > > --- a/tools/include/linux/coresight-pmu.h > > +++ b/tools/include/linux/coresight-pmu.h > > @@ -7,9 +7,14 @@ > > #ifndef _LINUX_CORESIGHT_PMU_H > > #define _LINUX_CORESIGHT_PMU_H > > > > +#include <linux/bits.h> > > + > > #define CORESIGHT_ETM_PMU_NAME "cs_etm" > > #define CORESIGHT_ETM_PMU_SEED 0x10 > > > > +/* CoreSight trace ID is currently the bottom 7 bits of the value */ > > +#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0) > > + > > /* > > * Below are the definition of bit offsets for perf option, and works as > > * arbitrary values for all ETM versions. > > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c > > index f65bac5ddbdb..f6ca07f68b25 100644 > > --- a/tools/perf/util/cs-etm.c > > +++ b/tools/perf/util/cs-etm.c > > @@ -196,6 +196,30 @@ int cs_etm__get_pid_fmt(u8 trace_chan_id, u64 *pid_fmt) > > return 0; > > } > > > > +static int cs_etm__map_trace_id(u8 trace_chan_id, u64 *cpu_metadata) > > +{ > > + struct int_node *inode; > > + > > + /* Get an RB node for this CPU */ > > + inode = intlist__findnew(traceid_list, trace_chan_id); > > + > > + /* Something went wrong, no need to continue */ > > + if (!inode) > > + return -ENOMEM; > > + > > + /* > > + * The node for that CPU should not be taken. > > + * Back out if that's the case. > > + */ > > + if (inode->priv) > > + return -EINVAL; > > + > > + /* All good, associate the traceID with the metadata pointer */ > > + inode->priv = cpu_metadata; > > + > > + return 0; > > +} > > + > > void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq, > > u8 trace_chan_id) > > { > > @@ -2804,6 +2828,36 @@ static bool cs_etm__has_virtual_ts(u64 **metadata, int num_cpu) > > return true; > > } > > > > +/* map trace ids to correct metadata block, from information in metadata */ > > +static int cs_etm__map_trace_ids_metadata(int num_cpu, u64 **metadata) > > +{ > > + u64 cs_etm_magic; > > + u8 trace_chan_id; > > + int i, err; > > + > > + for (i = 0; i < num_cpu; i++) { > > + cs_etm_magic = metadata[i][CS_ETM_MAGIC]; > > + switch (cs_etm_magic) { > > + case __perf_cs_etmv3_magic: > > + trace_chan_id = (u8)((metadata[i][CS_ETM_ETMTRACEIDR]) & > > + CORESIGHT_TRACE_ID_VAL_MASK); > > + break; > > + case __perf_cs_etmv4_magic: > > + case __perf_cs_ete_magic: > > + trace_chan_id = (u8)((metadata[i][CS_ETMV4_TRCTRACEIDR]) & > > + CORESIGHT_TRACE_ID_VAL_MASK); > > + break; > > + default: > > + /* unknown magic number */ > > + return -EINVAL; > > + } > > + err = cs_etm__map_trace_id(trace_chan_id, metadata[i]); > > + if (err) > > + return err; > > + } > > + return 0; > > +} > > + > > int cs_etm__process_auxtrace_info_full(union perf_event *event, > > struct perf_session *session) > > { > > @@ -2814,7 +2868,7 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > int event_header_size = sizeof(struct perf_event_header); > > int total_size = auxtrace_info->header.size; > > int priv_size = 0; > > - int num_cpu, trcidr_idx; > > + int num_cpu; > > int err = 0; > > int i, j; > > u64 *ptr = NULL; > > @@ -2853,23 +2907,13 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > cs_etm__create_meta_blk(ptr, &i, > > CS_ETM_PRIV_MAX, > > CS_ETM_NR_TRC_PARAMS_V0); > > - > > - /* The traceID is our handle */ > > - trcidr_idx = CS_ETM_ETMTRACEIDR; > > - > > } else if (ptr[i] == __perf_cs_etmv4_magic) { > > metadata[j] = > > cs_etm__create_meta_blk(ptr, &i, > > CS_ETMV4_PRIV_MAX, > > CS_ETMV4_NR_TRC_PARAMS_V0); > > - > > - /* The traceID is our handle */ > > - trcidr_idx = CS_ETMV4_TRCTRACEIDR; > > } else if (ptr[i] == __perf_cs_ete_magic) { > > metadata[j] = cs_etm__create_meta_blk(ptr, &i, CS_ETE_PRIV_MAX, -1); > > - > > - /* ETE shares first part of metadata with ETMv4 */ > > - trcidr_idx = CS_ETMV4_TRCTRACEIDR; > > } else { > > ui__error("CS ETM Trace: Unrecognised magic number %#"PRIx64". File could be from a newer version of perf.\n", > > ptr[i]); > > @@ -2881,26 +2925,6 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > err = -ENOMEM; > > goto err_free_metadata; > > } > > - > > - /* Get an RB node for this CPU */ > > - inode = intlist__findnew(traceid_list, metadata[j][trcidr_idx]); > > - > > - /* Something went wrong, no need to continue */ > > - if (!inode) { > > - err = -ENOMEM; > > - goto err_free_metadata; > > - } > > - > > - /* > > - * The node for that CPU should not be taken. > > - * Back out if that's the case. > > - */ > > - if (inode->priv) { > > - err = -EINVAL; > > - goto err_free_metadata; > > - } > > - /* All good, associate the traceID with the metadata pointer */ > > - inode->priv = metadata[j]; > > } > > > > /* > > @@ -2994,6 +3018,11 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > if (err) > > goto err_delete_thread; > > > > + /* before aux records are queued, need to map metadata to trace IDs */ > > + err = cs_etm__map_trace_ids_metadata(num_cpu, metadata); > > + if (err) > > + goto err_delete_thread; > > + > > err = cs_etm__queue_aux_records(session); > > if (err) > > goto err_delete_thread; > > diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h > > index 98a4f7113d2f..6d3078e042b4 100644 > > --- a/tools/perf/util/cs-etm.h > > +++ b/tools/perf/util/cs-etm.h > > @@ -29,13 +29,17 @@ enum { > > /* > > * Update the version for new format. > > * > > - * New version 1 format adds a param count to the per cpu metadata. > > + * Version 1: format adds a param count to the per cpu metadata. > > * This allows easy adding of new metadata parameters. > > * Requires that new params always added after current ones. > > * Also allows client reader to handle file versions that are different by > > * checking the number of params in the file vs the number expected. > > + * > > + * Version 2: Drivers will use PERF_RECORD_AUX_OUTPUT_HW_ID to output > > + * CoreSight Trace ID. ...TRACEIDR metadata will be set to unused ID. > > */ > > -#define CS_HEADER_CURRENT_VERSION 1 > > +#define CS_HEADER_CURRENT_VERSION 2 > > +#define CS_AUX_HW_ID_VERSION_MIN 2 > > > > /* Beginning of header common to both ETMv3 and V4 */ > > enum { > > @@ -97,6 +101,12 @@ enum { > > CS_ETE_PRIV_MAX > > }; > > > > +/* > > + * Check for valid CoreSight trace ID. If an invalid value is present in the metadata, > > + * then IDs are present in the hardware ID packet in the data file. > > + */ > > +#define CS_IS_VALID_TRACE_ID(id) ((id > 0) && (id < 0x70)) > > + > > /* > > * ETMv3 exception encoding number: > > * See Embedded Trace Macrocell specification (ARM IHI 0014Q) > > -- > > 2.32.0 > > > > -- > > - Arnaldo
On Wed, 29 Mar 2023 at 13:42, Arnaldo Carvalho de Melo <acme@kernel.org> wrote: > > Em Wed, Mar 29, 2023 at 09:41:08AM -0300, Arnaldo Carvalho de Melo escreveu: > > Em Wed, Mar 29, 2023 at 12:14:20PM +0100, Mike Leach escreveu: > > > The information to associate Trace ID and CPU will be changing. > > > > > > Drivers will start outputting this as a hardware ID packet in the data > > > file which if present will be used in preference to the AUXINFO values. > > > > CC /tmp/build/perf-tools-next/util/symbol-elf.o > > LD /tmp/build/perf-tools-next/util/cs-etm-decoder/perf-in.o > > util/cs-etm.c: In function ‘cs_etm__process_auxtrace_info_full’: > > util/cs-etm.c:2866:26: error: unused variable ‘inode’ [-Werror=unused-variable] > > 2866 | struct int_node *inode; > > | ^~~~~ > > cc1: all warnings being treated as errors > > make[4]: *** [/var/home/acme/git/perf-tools-next/tools/build/Makefile.build:97: /tmp/build/perf-tools-next/util/cs-etm.o] Error 1 > > make[4]: *** Waiting for unfinished jobs.... > > gmake[3]: *** [/var/home/acme/git/perf-tools-next/tools/build/Makefile.build:140: util] Err > > > > Trying to fix... > > Seems simple, the variable isn't used at all, so I added: > > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c > index f6ca07f68b251274..5fc9c288080b4526 100644 > --- a/tools/perf/util/cs-etm.c > +++ b/tools/perf/util/cs-etm.c > @@ -2863,7 +2863,6 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > { > struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info; > struct cs_etm_auxtrace *etm = NULL; > - struct int_node *inode; > struct perf_record_time_conv *tc = &session->time_conv; > int event_header_size = sizeof(struct perf_event_header); > int total_size = auxtrace_info->header.size; > > > > > > To prepare for this we provide a helper functions to do the individual ID > > > mapping, and one to extract the IDs from the completed metadata blocks. > > > > > > Signed-off-by: Mike Leach <mike.leach@linaro.org> > > > Reviewed-by: James Clark <james.clark@arm.com> > > > Acked-by: Suzuki K Poulose <suzuki.poulose@arm.com> > > > --- > > > tools/include/linux/coresight-pmu.h | 5 ++ > > > tools/perf/util/cs-etm.c | 91 +++++++++++++++++++---------- > > > tools/perf/util/cs-etm.h | 14 ++++- > > > 3 files changed, 77 insertions(+), 33 deletions(-) > > > > > > diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h > > > index 6c2fd6cc5a98..db9c7c0abb6a 100644 > > > --- a/tools/include/linux/coresight-pmu.h > > > +++ b/tools/include/linux/coresight-pmu.h > > > @@ -7,9 +7,14 @@ > > > #ifndef _LINUX_CORESIGHT_PMU_H > > > #define _LINUX_CORESIGHT_PMU_H > > > > > > +#include <linux/bits.h> > > > + > > > #define CORESIGHT_ETM_PMU_NAME "cs_etm" > > > #define CORESIGHT_ETM_PMU_SEED 0x10 > > > > > > +/* CoreSight trace ID is currently the bottom 7 bits of the value */ > > > +#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0) > > > + > > > /* > > > * Below are the definition of bit offsets for perf option, and works as > > > * arbitrary values for all ETM versions. > > > diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c > > > index f65bac5ddbdb..f6ca07f68b25 100644 > > > --- a/tools/perf/util/cs-etm.c > > > +++ b/tools/perf/util/cs-etm.c > > > @@ -196,6 +196,30 @@ int cs_etm__get_pid_fmt(u8 trace_chan_id, u64 *pid_fmt) > > > return 0; > > > } > > > > > > +static int cs_etm__map_trace_id(u8 trace_chan_id, u64 *cpu_metadata) > > > +{ > > > + struct int_node *inode; > > > + > > > + /* Get an RB node for this CPU */ > > > + inode = intlist__findnew(traceid_list, trace_chan_id); > > > + > > > + /* Something went wrong, no need to continue */ > > > + if (!inode) > > > + return -ENOMEM; > > > + > > > + /* > > > + * The node for that CPU should not be taken. > > > + * Back out if that's the case. > > > + */ > > > + if (inode->priv) > > > + return -EINVAL; > > > + > > > + /* All good, associate the traceID with the metadata pointer */ > > > + inode->priv = cpu_metadata; > > > + > > > + return 0; > > > +} > > > + > > > void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq, > > > u8 trace_chan_id) > > > { > > > @@ -2804,6 +2828,36 @@ static bool cs_etm__has_virtual_ts(u64 **metadata, int num_cpu) > > > return true; > > > } > > > > > > +/* map trace ids to correct metadata block, from information in metadata */ > > > +static int cs_etm__map_trace_ids_metadata(int num_cpu, u64 **metadata) > > > +{ > > > + u64 cs_etm_magic; > > > + u8 trace_chan_id; > > > + int i, err; > > > + > > > + for (i = 0; i < num_cpu; i++) { > > > + cs_etm_magic = metadata[i][CS_ETM_MAGIC]; > > > + switch (cs_etm_magic) { > > > + case __perf_cs_etmv3_magic: > > > + trace_chan_id = (u8)((metadata[i][CS_ETM_ETMTRACEIDR]) & > > > + CORESIGHT_TRACE_ID_VAL_MASK); > > > + break; > > > + case __perf_cs_etmv4_magic: > > > + case __perf_cs_ete_magic: > > > + trace_chan_id = (u8)((metadata[i][CS_ETMV4_TRCTRACEIDR]) & > > > + CORESIGHT_TRACE_ID_VAL_MASK); > > > + break; > > > + default: > > > + /* unknown magic number */ > > > + return -EINVAL; > > > + } > > > + err = cs_etm__map_trace_id(trace_chan_id, metadata[i]); > > > + if (err) > > > + return err; > > > + } > > > + return 0; > > > +} > > > + > > > int cs_etm__process_auxtrace_info_full(union perf_event *event, > > > struct perf_session *session) > > > { > > > @@ -2814,7 +2868,7 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > > int event_header_size = sizeof(struct perf_event_header); > > > int total_size = auxtrace_info->header.size; > > > int priv_size = 0; > > > - int num_cpu, trcidr_idx; > > > + int num_cpu; > > > int err = 0; > > > int i, j; > > > u64 *ptr = NULL; > > > @@ -2853,23 +2907,13 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > > cs_etm__create_meta_blk(ptr, &i, > > > CS_ETM_PRIV_MAX, > > > CS_ETM_NR_TRC_PARAMS_V0); > > > - > > > - /* The traceID is our handle */ > > > - trcidr_idx = CS_ETM_ETMTRACEIDR; > > > - > > > } else if (ptr[i] == __perf_cs_etmv4_magic) { > > > metadata[j] = > > > cs_etm__create_meta_blk(ptr, &i, > > > CS_ETMV4_PRIV_MAX, > > > CS_ETMV4_NR_TRC_PARAMS_V0); > > > - > > > - /* The traceID is our handle */ > > > - trcidr_idx = CS_ETMV4_TRCTRACEIDR; > > > } else if (ptr[i] == __perf_cs_ete_magic) { > > > metadata[j] = cs_etm__create_meta_blk(ptr, &i, CS_ETE_PRIV_MAX, -1); > > > - > > > - /* ETE shares first part of metadata with ETMv4 */ > > > - trcidr_idx = CS_ETMV4_TRCTRACEIDR; > > > } else { > > > ui__error("CS ETM Trace: Unrecognised magic number %#"PRIx64". File could be from a newer version of perf.\n", > > > ptr[i]); > > > @@ -2881,26 +2925,6 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > > err = -ENOMEM; > > > goto err_free_metadata; > > > } > > > - > > > - /* Get an RB node for this CPU */ > > > - inode = intlist__findnew(traceid_list, metadata[j][trcidr_idx]); > > > - > > > - /* Something went wrong, no need to continue */ > > > - if (!inode) { > > > - err = -ENOMEM; > > > - goto err_free_metadata; > > > - } > > > - > > > - /* > > > - * The node for that CPU should not be taken. > > > - * Back out if that's the case. > > > - */ > > > - if (inode->priv) { > > > - err = -EINVAL; > > > - goto err_free_metadata; > > > - } > > > - /* All good, associate the traceID with the metadata pointer */ > > > - inode->priv = metadata[j]; > > > } > > > > > > /* > > > @@ -2994,6 +3018,11 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, > > > if (err) > > > goto err_delete_thread; > > > > > > + /* before aux records are queued, need to map metadata to trace IDs */ > > > + err = cs_etm__map_trace_ids_metadata(num_cpu, metadata); > > > + if (err) > > > + goto err_delete_thread; > > > + > > > err = cs_etm__queue_aux_records(session); > > > if (err) > > > goto err_delete_thread; > > > diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h > > > index 98a4f7113d2f..6d3078e042b4 100644 > > > --- a/tools/perf/util/cs-etm.h > > > +++ b/tools/perf/util/cs-etm.h > > > @@ -29,13 +29,17 @@ enum { > > > /* > > > * Update the version for new format. > > > * > > > - * New version 1 format adds a param count to the per cpu metadata. > > > + * Version 1: format adds a param count to the per cpu metadata. > > > * This allows easy adding of new metadata parameters. > > > * Requires that new params always added after current ones. > > > * Also allows client reader to handle file versions that are different by > > > * checking the number of params in the file vs the number expected. > > > + * > > > + * Version 2: Drivers will use PERF_RECORD_AUX_OUTPUT_HW_ID to output > > > + * CoreSight Trace ID. ...TRACEIDR metadata will be set to unused ID. > > > */ > > > -#define CS_HEADER_CURRENT_VERSION 1 > > > +#define CS_HEADER_CURRENT_VERSION 2 > > > +#define CS_AUX_HW_ID_VERSION_MIN 2 > > > > > > /* Beginning of header common to both ETMv3 and V4 */ > > > enum { > > > @@ -97,6 +101,12 @@ enum { > > > CS_ETE_PRIV_MAX > > > }; > > > > > > +/* > > > + * Check for valid CoreSight trace ID. If an invalid value is present in the metadata, > > > + * then IDs are present in the hardware ID packet in the data file. > > > + */ > > > +#define CS_IS_VALID_TRACE_ID(id) ((id > 0) && (id < 0x70)) > > > + > > > /* > > > * ETMv3 exception encoding number: > > > * See Embedded Trace Macrocell specification (ARM IHI 0014Q) > > > -- > > > 2.32.0 > > > > > > > -- > > > > - Arnaldo > > -- > > - Arnaldo Sorry - my error. The same change is made in patch 3/3 of this set. Looks like I didn't do a patch by patch build check when I was testing yesterday Mike
Em Wed, Mar 29, 2023 at 01:59:10PM +0100, Mike Leach escreveu: > Sorry - my error. > > The same change is made in patch 3/3 of this set. > > Looks like I didn't do a patch by patch build check when I was testing yesterday np, its fixed now and pushed to tmp.perf-tools-next, please check, will go to perf-tools-next later today after passing thru my set of container build tests. - Arnaldo
On Wed, 29 Mar 2023 at 14:22, Arnaldo Carvalho de Melo <acme@kernel.org> wrote: > > Em Wed, Mar 29, 2023 at 01:59:10PM +0100, Mike Leach escreveu: > > Sorry - my error. > > > > The same change is made in patch 3/3 of this set. > > > > Looks like I didn't do a patch by patch build check when I was testing yesterday > > np, its fixed now and pushed to tmp.perf-tools-next, please check, will > go to perf-tools-next later today after passing thru my set of container > build tests. > > - Arnaldo tmp.perf-tools-next - Builds and tests OK Mike
Em Wed, Mar 29, 2023 at 03:47:25PM +0100, Mike Leach escreveu: > On Wed, 29 Mar 2023 at 14:22, Arnaldo Carvalho de Melo <acme@kernel.org> wrote: > > > > Em Wed, Mar 29, 2023 at 01:59:10PM +0100, Mike Leach escreveu: > > > Sorry - my error. > > > > > > The same change is made in patch 3/3 of this set. > > > > > > Looks like I didn't do a patch by patch build check when I was testing yesterday > > > > np, its fixed now and pushed to tmp.perf-tools-next, please check, will > > go to perf-tools-next later today after passing thru my set of container > > build tests. > > > > - Arnaldo > > tmp.perf-tools-next - Builds and tests OK Not here, I'll check after a call: 50 9.90 ubuntu:18.04-x-arm : FAIL gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) arch/arm/util/cs-etm.c: In function 'cs_etm_save_ete_header': arch/arm/util/cs-etm.c:720:29: error: implicit declaration of function 'coresight_get_trace_id' [-Werror=implicit-function-declaration] data[CS_ETE_TRCTRACEIDR] = coresight_get_trace_id(cpu); ^~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'util' failed make[5]: *** [util] Error 2 /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arm' failed make[4]: *** [arm] Error 2 /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arch' failed make[3]: *** [arch] Error 2 51 9.50 ubuntu:18.04-x-arm64 : FAIL gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) arch/arm64/util/../../arm/util/cs-etm.c: In function 'cs_etm_save_ete_header': arch/arm64/util/../../arm/util/cs-etm.c:720:29: error: implicit declaration of function 'coresight_get_trace_id' [-Werror=implicit-function-declaration] data[CS_ETE_TRCTRACEIDR] = coresight_get_trace_id(cpu); ^~~~~~~~~~~~~~~~~~~~~~ cc1: all warnings being treated as errors /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'util' failed make[5]: *** [util] Error 2 /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arm64' failed make[4]: *** [arm64] Error 2 /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arch' failed make[3]: *** [arch] Error 2 52 19.34 ubuntu:18.04-x-m68k : Ok m68k-linux-gnu-gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0
Em Wed, Mar 29, 2023 at 04:28:19PM -0300, Arnaldo Carvalho de Melo escreveu: > Em Wed, Mar 29, 2023 at 03:47:25PM +0100, Mike Leach escreveu: > > On Wed, 29 Mar 2023 at 14:22, Arnaldo Carvalho de Melo <acme@kernel.org> wrote: > > > > > > Em Wed, Mar 29, 2023 at 01:59:10PM +0100, Mike Leach escreveu: > > > > Sorry - my error. > > > > > > > > The same change is made in patch 3/3 of this set. > > > > > > > > Looks like I didn't do a patch by patch build check when I was testing yesterday > > > > > > np, its fixed now and pushed to tmp.perf-tools-next, please check, will > > > go to perf-tools-next later today after passing thru my set of container > > > build tests. > > > > > > - Arnaldo > > > > tmp.perf-tools-next - Builds and tests OK > > Not here, I'll check after a call: > > 50 9.90 ubuntu:18.04-x-arm : FAIL gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) > arch/arm/util/cs-etm.c: In function 'cs_etm_save_ete_header': > arch/arm/util/cs-etm.c:720:29: error: implicit declaration of function 'coresight_get_trace_id' [-Werror=implicit-function-declaration] > data[CS_ETE_TRCTRACEIDR] = coresight_get_trace_id(cpu); > ^~~~~~~~~~~~~~~~~~~~~~ This function was removed in: Author: Mike Leach <mike.leach@linaro.org> Date: Wed Mar 29 12:14:21 2023 +0100 perf cs-etm: Update record event to use new Trace ID protocol Trace IDs are now dynamically allocated. I'm removing this series from perf-tools-next, please address this issue and send a v9. Thanks, - Arnaldo > cc1: all warnings being treated as errors > /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'util' failed > make[5]: *** [util] Error 2 > /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arm' failed > make[4]: *** [arm] Error 2 > /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arch' failed > make[3]: *** [arch] Error 2 > 51 9.50 ubuntu:18.04-x-arm64 : FAIL gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) > arch/arm64/util/../../arm/util/cs-etm.c: In function 'cs_etm_save_ete_header': > arch/arm64/util/../../arm/util/cs-etm.c:720:29: error: implicit declaration of function 'coresight_get_trace_id' [-Werror=implicit-function-declaration] > data[CS_ETE_TRCTRACEIDR] = coresight_get_trace_id(cpu); > ^~~~~~~~~~~~~~~~~~~~~~ > cc1: all warnings being treated as errors > /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'util' failed > make[5]: *** [util] Error 2 > /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arm64' failed > make[4]: *** [arm64] Error 2 > /git/perf-6.3.0-rc1/tools/build/Makefile.build:140: recipe for target 'arch' failed > make[3]: *** [arch] Error 2 > 52 19.34 ubuntu:18.04-x-m68k : Ok m68k-linux-gnu-gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0
On Wed, Mar 29, 2023 at 07:14:52PM -0300, Arnaldo Carvalho de Melo wrote: [...] > > Not here, I'll check after a call: > > > > 50 9.90 ubuntu:18.04-x-arm : FAIL gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) > > arch/arm/util/cs-etm.c: In function 'cs_etm_save_ete_header': > > arch/arm/util/cs-etm.c:720:29: error: implicit declaration of function 'coresight_get_trace_id' [-Werror=implicit-function-declaration] > > data[CS_ETE_TRCTRACEIDR] = coresight_get_trace_id(cpu); > > ^~~~~~~~~~~~~~~~~~~~~~ > > This function was removed in: > > Author: Mike Leach <mike.leach@linaro.org> > Date: Wed Mar 29 12:14:21 2023 +0100 > > perf cs-etm: Update record event to use new Trace ID protocol > > Trace IDs are now dynamically allocated. > > I'm removing this series from perf-tools-next, please address this issue > and send a v9. I can reproduce this building failure. I am curious for how to verify building for patch wise, the link [1] gives me some hints and below command works for me: $ git rebase -i --exec "make -C tools/perf clean && \ make -C tools/perf VF=1 DEBUG=1 CORESIGHT=1 && \ make -C tools/perf clean && \ make -C tools/perf VF=1 DEBUG=1" HEAD~3 Thanks, Leo [1] https://stackoverflow.com/questions/26983700/git-run-shell-command-for-each-commit
On 30/03/2023 04:13, Leo Yan wrote: > On Wed, Mar 29, 2023 at 07:14:52PM -0300, Arnaldo Carvalho de Melo wrote: > > [...] > >>> Not here, I'll check after a call: >>> >>> 50 9.90 ubuntu:18.04-x-arm : FAIL gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) >>> arch/arm/util/cs-etm.c: In function 'cs_etm_save_ete_header': >>> arch/arm/util/cs-etm.c:720:29: error: implicit declaration of function 'coresight_get_trace_id' [-Werror=implicit-function-declaration] >>> data[CS_ETE_TRCTRACEIDR] = coresight_get_trace_id(cpu); >>> ^~~~~~~~~~~~~~~~~~~~~~ >> >> This function was removed in: >> >> Author: Mike Leach <mike.leach@linaro.org> >> Date: Wed Mar 29 12:14:21 2023 +0100 >> >> perf cs-etm: Update record event to use new Trace ID protocol >> >> Trace IDs are now dynamically allocated. >> >> I'm removing this series from perf-tools-next, please address this issue >> and send a v9. > > I can reproduce this building failure. I am curious for how to verify > building for patch wise, the link [1] gives me some hints and below > command works for me: > > $ git rebase -i --exec "make -C tools/perf clean && \ > make -C tools/perf VF=1 DEBUG=1 CORESIGHT=1 && \ > make -C tools/perf clean && \ > make -C tools/perf VF=1 DEBUG=1" HEAD~3 Looks like perf-tools-next has some changes that has not reflected elsewhere. The ts_source patches are queued there, which is causing the above build failure. Mike, Are you able to rebase your patches on perf-tools-next branch ? Kind regards Suzuki > > Thanks, > Leo > > [1] https://stackoverflow.com/questions/26983700/git-run-shell-command-for-each-commit
Hi On Thu, 30 Mar 2023 at 11:55, Suzuki K Poulose <suzuki.poulose@arm.com> wrote: > > On 30/03/2023 04:13, Leo Yan wrote: > > On Wed, Mar 29, 2023 at 07:14:52PM -0300, Arnaldo Carvalho de Melo wrote: > > > > [...] > > > >>> Not here, I'll check after a call: > >>> > >>> 50 9.90 ubuntu:18.04-x-arm : FAIL gcc version 7.5.0 (Ubuntu/Linaro 7.5.0-3ubuntu1~18.04) > >>> arch/arm/util/cs-etm.c: In function 'cs_etm_save_ete_header': > >>> arch/arm/util/cs-etm.c:720:29: error: implicit declaration of function 'coresight_get_trace_id' [-Werror=implicit-function-declaration] > >>> data[CS_ETE_TRCTRACEIDR] = coresight_get_trace_id(cpu); > >>> ^~~~~~~~~~~~~~~~~~~~~~ > >> > >> This function was removed in: > >> > >> Author: Mike Leach <mike.leach@linaro.org> > >> Date: Wed Mar 29 12:14:21 2023 +0100 > >> > >> perf cs-etm: Update record event to use new Trace ID protocol > >> > >> Trace IDs are now dynamically allocated. > >> > >> I'm removing this series from perf-tools-next, please address this issue > >> and send a v9. > > > > I can reproduce this building failure. I am curious for how to verify > > building for patch wise, the link [1] gives me some hints and below > > command works for me: > > > > $ git rebase -i --exec "make -C tools/perf clean && \ > > make -C tools/perf VF=1 DEBUG=1 CORESIGHT=1 && \ > > make -C tools/perf clean && \ > > make -C tools/perf VF=1 DEBUG=1" HEAD~3 > Thanks Leo. However, I've now written a python script that given a patch directory will run: foreach patch in dir git am patch build so that can work directly on patches before they are sent - or when they are received in future. > Looks like perf-tools-next has some changes that has not reflected > elsewhere. The ts_source patches are queued there, which is causing > the above build failure. > Mike, > > Are you able to rebase your patches on perf-tools-next branch ? > perf/core and perf-tools-next are both on the same commit. v9 tested against perf/core Mike > Kind regards > Suzuki > > > > > Thanks, > > Leo > > > > [1] https://stackoverflow.com/questions/26983700/git-run-shell-command-for-each-commit >
diff --git a/tools/include/linux/coresight-pmu.h b/tools/include/linux/coresight-pmu.h index 6c2fd6cc5a98..db9c7c0abb6a 100644 --- a/tools/include/linux/coresight-pmu.h +++ b/tools/include/linux/coresight-pmu.h @@ -7,9 +7,14 @@ #ifndef _LINUX_CORESIGHT_PMU_H #define _LINUX_CORESIGHT_PMU_H +#include <linux/bits.h> + #define CORESIGHT_ETM_PMU_NAME "cs_etm" #define CORESIGHT_ETM_PMU_SEED 0x10 +/* CoreSight trace ID is currently the bottom 7 bits of the value */ +#define CORESIGHT_TRACE_ID_VAL_MASK GENMASK(6, 0) + /* * Below are the definition of bit offsets for perf option, and works as * arbitrary values for all ETM versions. diff --git a/tools/perf/util/cs-etm.c b/tools/perf/util/cs-etm.c index f65bac5ddbdb..f6ca07f68b25 100644 --- a/tools/perf/util/cs-etm.c +++ b/tools/perf/util/cs-etm.c @@ -196,6 +196,30 @@ int cs_etm__get_pid_fmt(u8 trace_chan_id, u64 *pid_fmt) return 0; } +static int cs_etm__map_trace_id(u8 trace_chan_id, u64 *cpu_metadata) +{ + struct int_node *inode; + + /* Get an RB node for this CPU */ + inode = intlist__findnew(traceid_list, trace_chan_id); + + /* Something went wrong, no need to continue */ + if (!inode) + return -ENOMEM; + + /* + * The node for that CPU should not be taken. + * Back out if that's the case. + */ + if (inode->priv) + return -EINVAL; + + /* All good, associate the traceID with the metadata pointer */ + inode->priv = cpu_metadata; + + return 0; +} + void cs_etm__etmq_set_traceid_queue_timestamp(struct cs_etm_queue *etmq, u8 trace_chan_id) { @@ -2804,6 +2828,36 @@ static bool cs_etm__has_virtual_ts(u64 **metadata, int num_cpu) return true; } +/* map trace ids to correct metadata block, from information in metadata */ +static int cs_etm__map_trace_ids_metadata(int num_cpu, u64 **metadata) +{ + u64 cs_etm_magic; + u8 trace_chan_id; + int i, err; + + for (i = 0; i < num_cpu; i++) { + cs_etm_magic = metadata[i][CS_ETM_MAGIC]; + switch (cs_etm_magic) { + case __perf_cs_etmv3_magic: + trace_chan_id = (u8)((metadata[i][CS_ETM_ETMTRACEIDR]) & + CORESIGHT_TRACE_ID_VAL_MASK); + break; + case __perf_cs_etmv4_magic: + case __perf_cs_ete_magic: + trace_chan_id = (u8)((metadata[i][CS_ETMV4_TRCTRACEIDR]) & + CORESIGHT_TRACE_ID_VAL_MASK); + break; + default: + /* unknown magic number */ + return -EINVAL; + } + err = cs_etm__map_trace_id(trace_chan_id, metadata[i]); + if (err) + return err; + } + return 0; +} + int cs_etm__process_auxtrace_info_full(union perf_event *event, struct perf_session *session) { @@ -2814,7 +2868,7 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, int event_header_size = sizeof(struct perf_event_header); int total_size = auxtrace_info->header.size; int priv_size = 0; - int num_cpu, trcidr_idx; + int num_cpu; int err = 0; int i, j; u64 *ptr = NULL; @@ -2853,23 +2907,13 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, cs_etm__create_meta_blk(ptr, &i, CS_ETM_PRIV_MAX, CS_ETM_NR_TRC_PARAMS_V0); - - /* The traceID is our handle */ - trcidr_idx = CS_ETM_ETMTRACEIDR; - } else if (ptr[i] == __perf_cs_etmv4_magic) { metadata[j] = cs_etm__create_meta_blk(ptr, &i, CS_ETMV4_PRIV_MAX, CS_ETMV4_NR_TRC_PARAMS_V0); - - /* The traceID is our handle */ - trcidr_idx = CS_ETMV4_TRCTRACEIDR; } else if (ptr[i] == __perf_cs_ete_magic) { metadata[j] = cs_etm__create_meta_blk(ptr, &i, CS_ETE_PRIV_MAX, -1); - - /* ETE shares first part of metadata with ETMv4 */ - trcidr_idx = CS_ETMV4_TRCTRACEIDR; } else { ui__error("CS ETM Trace: Unrecognised magic number %#"PRIx64". File could be from a newer version of perf.\n", ptr[i]); @@ -2881,26 +2925,6 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, err = -ENOMEM; goto err_free_metadata; } - - /* Get an RB node for this CPU */ - inode = intlist__findnew(traceid_list, metadata[j][trcidr_idx]); - - /* Something went wrong, no need to continue */ - if (!inode) { - err = -ENOMEM; - goto err_free_metadata; - } - - /* - * The node for that CPU should not be taken. - * Back out if that's the case. - */ - if (inode->priv) { - err = -EINVAL; - goto err_free_metadata; - } - /* All good, associate the traceID with the metadata pointer */ - inode->priv = metadata[j]; } /* @@ -2994,6 +3018,11 @@ int cs_etm__process_auxtrace_info_full(union perf_event *event, if (err) goto err_delete_thread; + /* before aux records are queued, need to map metadata to trace IDs */ + err = cs_etm__map_trace_ids_metadata(num_cpu, metadata); + if (err) + goto err_delete_thread; + err = cs_etm__queue_aux_records(session); if (err) goto err_delete_thread; diff --git a/tools/perf/util/cs-etm.h b/tools/perf/util/cs-etm.h index 98a4f7113d2f..6d3078e042b4 100644 --- a/tools/perf/util/cs-etm.h +++ b/tools/perf/util/cs-etm.h @@ -29,13 +29,17 @@ enum { /* * Update the version for new format. * - * New version 1 format adds a param count to the per cpu metadata. + * Version 1: format adds a param count to the per cpu metadata. * This allows easy adding of new metadata parameters. * Requires that new params always added after current ones. * Also allows client reader to handle file versions that are different by * checking the number of params in the file vs the number expected. + * + * Version 2: Drivers will use PERF_RECORD_AUX_OUTPUT_HW_ID to output + * CoreSight Trace ID. ...TRACEIDR metadata will be set to unused ID. */ -#define CS_HEADER_CURRENT_VERSION 1 +#define CS_HEADER_CURRENT_VERSION 2 +#define CS_AUX_HW_ID_VERSION_MIN 2 /* Beginning of header common to both ETMv3 and V4 */ enum { @@ -97,6 +101,12 @@ enum { CS_ETE_PRIV_MAX }; +/* + * Check for valid CoreSight trace ID. If an invalid value is present in the metadata, + * then IDs are present in the hardware ID packet in the data file. + */ +#define CS_IS_VALID_TRACE_ID(id) ((id > 0) && (id < 0x70)) + /* * ETMv3 exception encoding number: * See Embedded Trace Macrocell specification (ARM IHI 0014Q)