Message ID | 20230331071907.4127388-1-patrice.chotard@foss.st.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | ARM: dts: stm32: Add QSPI support on STM32MP13x SoC family | expand |
hi Patrice On 3/31/23 09:19, patrice.chotard@foss.st.com wrote: > From: Patrice Chotard <patrice.chotard@foss.st.com> > > Add QSPI support on STM32MP13x SoC family > > Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> > --- > arch/arm/boot/dts/stm32mp131.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi > index 5949473cbbfd..544c755b6e67 100644 > --- a/arch/arm/boot/dts/stm32mp131.dtsi > +++ b/arch/arm/boot/dts/stm32mp131.dtsi > @@ -1137,6 +1137,21 @@ mdma: dma-controller@58000000 { > dma-requests = <48>; > }; > > + qspi: spi@58003000 { > + compatible = "st,stm32f469-qspi"; > + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; > + reg-names = "qspi", "qspi_mm"; > + #address-cells = <1>; > + #size-cells = <0>; > + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; > + dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, > + <&mdma 26 0x2 0x10100008 0x0 0x0>; > + dma-names = "tx", "rx"; > + clocks = <&rcc QSPI_K>; > + resets = <&rcc QSPI_R>; > + status = "disabled"; > + }; > + > sdmmc1: mmc@58005000 { > compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; > arm,primecell-periphid = <0x20253180>; Applied on stm32-next. Thanks. Alex
diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi index 5949473cbbfd..544c755b6e67 100644 --- a/arch/arm/boot/dts/stm32mp131.dtsi +++ b/arch/arm/boot/dts/stm32mp131.dtsi @@ -1137,6 +1137,21 @@ mdma: dma-controller@58000000 { dma-requests = <48>; }; + qspi: spi@58003000 { + compatible = "st,stm32f469-qspi"; + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; + reg-names = "qspi", "qspi_mm"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; + dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, + <&mdma 26 0x2 0x10100008 0x0 0x0>; + dma-names = "tx", "rx"; + clocks = <&rcc QSPI_K>; + resets = <&rcc QSPI_R>; + status = "disabled"; + }; + sdmmc1: mmc@58005000 { compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x20253180>;