From patchwork Fri Apr 14 10:52:23 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neha Malcom Francis X-Patchwork-Id: 13211263 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 02977C77B6E for ; Fri, 14 Apr 2023 10:53:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=EWSa5UneR5e4+FjHEcmHMDC5rlO4JXY/TAJOxV26vks=; b=rWaW1+o3D9L1Yu ws+nv0qHj8l3+qCyVdvZHMJoP8k7M6/RII6M1SWqN5dI0Q8omE0m8LU4YUuq2CiWz7pvMmbDSqs4Y U0vGRFlEGYJY3WuqAVRRg49TX1nVnapJq0mpRpX6eRw5ZU9ge5DTAcTlGYroLmLluby+hbL6ZPPcL csR3H9saAJMbuy98LbjGk/pVfa1kzDDwJ0lOYlY5QHA9iXaa/wxHk8tiW4qVNlOfByDkj89K3G4w4 FYnaqrTkD+DbaUcXpj1y09+w9gd36Sxl/9sUJBADvf4ci14kF8A9fboikRhGaGeIg4EuM9plQB6Ad GwOYEjjDy3mlgVwnAnZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1pnH2x-009FMB-1b; Fri, 14 Apr 2023 10:52:51 +0000 Received: from lelv0142.ext.ti.com ([198.47.23.249]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1pnH2n-009FGH-2f for linux-arm-kernel@lists.infradead.org; Fri, 14 Apr 2023 10:52:44 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33EAqWrC022563; Fri, 14 Apr 2023 05:52:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1681469552; bh=wjW5Q9o+zPh4H7+BmKkO/pXqv81GHjtQdM7IPo0mjJo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=WZPibKXaZpeYvLV/YitX7KkMprTMRdIuXq4rSWZmO8J3zIT0Khsd7wWfRNsEnsbjN 6vaWAN5TuVSrXGkaWi5+iG5SWJBNgB3MSSzIqaj9zc4feTw6uvx8nzmq1AQo7A1PSS 4FbMWe1qvNC6c1NvWY9LqoL8TTr394nflKSeXl9w= Received: from DFLE115.ent.ti.com (dfle115.ent.ti.com [10.64.6.36]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33EAqWpL114099 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 14 Apr 2023 05:52:32 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 14 Apr 2023 05:52:31 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 14 Apr 2023 05:52:31 -0500 Received: from ula0497641.dhcp.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33EAqPpf077262; Fri, 14 Apr 2023 05:52:29 -0500 From: Neha Malcom Francis To: , , , , , CC: , , , Subject: [PATCH 1/3] dt-bindings: misc: esm: Add ESM support for TI K3 devices Date: Fri, 14 Apr 2023 16:22:23 +0530 Message-ID: <20230414105225.194195-2-n-francis@ti.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230414105225.194195-1-n-francis@ti.com> References: <20230414105225.194195-1-n-francis@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230414_035241_986207_F9AC7E2F X-CRM114-Status: GOOD ( 14.26 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Document the binding for TI K3 ESM (Error Signaling Module) block. Signed-off-by: Neha Malcom Francis --- .../devicetree/bindings/misc/esm-k3.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/misc/esm-k3.yaml diff --git a/Documentation/devicetree/bindings/misc/esm-k3.yaml b/Documentation/devicetree/bindings/misc/esm-k3.yaml new file mode 100644 index 000000000000..5e637add3b0e --- /dev/null +++ b/Documentation/devicetree/bindings/misc/esm-k3.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/misc/esm-k3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 ESM Binding + +maintainers: + - Neha Malcom Francis + +description: | + The ESM (Error Signaling Module) is an IP block on TI K3 devices + that allows handling of safety events somewhat similar to what interrupt + controller would do. The safety signals have their separate paths within + the SoC, and they are handld by the ESM, which routes them to the proper + destination, which can be system reset, interrupt controller, etc. In the + simplest configuration the signals are just routed to reset the SoC. + +properties: + compatible: + const: ti,j721e-esm + + reg: + items: + - description: physical address and length of the registers which + contain revision and debug features + - description: physical address and length of the registers which + indicate strapping options + + ti,esm-pins: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + integer array of ESM event IDs to route to external event pin which can + be used to reset the SoC. The array can have an arbitrary amount of event + IDs listed on it. + minItems: 1 + maxItems: 255 + +additionalProperties: false + +required: + - compatible + - reg + - ti,esm-pins + +examples: + - | + main_esm: esm@700000 { + compatible = "ti,j721e-esm"; + reg = <0x0 0x700000 0x0 0x1000>; + ti,esm-pins = <344>, <345>; + };