From patchwork Wed Apr 19 22:33:22 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Judith Mendez X-Patchwork-Id: 13217589 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AE3F5C77B75 for ; Wed, 19 Apr 2023 22:34:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=4hZx7CkeOEmuJhoNXLuBqj00WGxEmQbpARJQnh50Wlc=; b=Kma4RVEW3Fr1lW U3TK4oBeVhZpkf21IRfDY6u4zk+buJ1z6hErMocsY6DHMSBrQAJi5Gmkg0X9GZmY5k/8TDZ6rzaxL i8NOnKe3dNsZUwn92bN9ID1N7YraB6CxyJPvzQLrX4jHSNC+mlsmzcfkXrf+kL2L736pcjs0ln7N4 UxG9cH1vzeB03WAdDsbrICG1DpvdsPyIrr8g5VEsfaYqPM/sU+E78peyI0m5QNu1/04s2B8DdVUa4 h70iPhOy+8jPWkVJWqBw+1nYIX/excJD5f88MuzwPdJA2owP19buA9A9HThnp2njQNl/SiVVxNdf0 +rgE2So7attemZPC6New==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1ppGN8-006Vqp-1t; Wed, 19 Apr 2023 22:33:54 +0000 Received: from lelv0143.ext.ti.com ([198.47.23.248]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1ppGMz-006VoW-1Q for linux-arm-kernel@lists.infradead.org; Wed, 19 Apr 2023 22:33:47 +0000 Received: from lelv0265.itg.ti.com ([10.180.67.224]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 33JMXO6e078079; Wed, 19 Apr 2023 17:33:24 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1681943604; bh=OrWMLGnqJwjHMR2zESshsELG2IHJFL0T+AwlGIO3pco=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=FQbPTeoyNkBPYpWOYcbN9XBT9hTBpXTj/II18vwjA7MVdmFljCrDMGYsR8Xj5oTOb Ebkmb+D7pylbJPEslARZxtZXq6nOKKG1mMukZke5GWdUKIsVyMfZX15/h0xcinBk8o 10DjKnxjfqUFVyElXJIaFfn0kiphe5gyEeZ5oNnY= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by lelv0265.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 33JMXOk7027126 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 19 Apr 2023 17:33:24 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Wed, 19 Apr 2023 17:33:24 -0500 Received: from lelv0327.itg.ti.com (10.180.67.183) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Wed, 19 Apr 2023 17:33:24 -0500 Received: from a0498204.dal.design.ti.com (ileaxei01-snat2.itg.ti.com [10.180.69.6]) by lelv0327.itg.ti.com (8.15.2/8.15.2) with ESMTP id 33JMXNLY015736; Wed, 19 Apr 2023 17:33:23 -0500 From: Judith Mendez To: Chandrasekar Ramakrishnan , Wolfgang Grandegger , Marc Kleine-Budde CC: "David S . Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Schuyler Patton , Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring , Krzysztof Kozlowski , Oliver Hartkopp , Judith Mendez , , , , , Subject: [PATCH 3/4] DO_NOT_MERGE arm64: dts: ti: Add AM62x MCAN MAIN domain transceiver overlay Date: Wed, 19 Apr 2023 17:33:22 -0500 Message-ID: <20230419223323.20384-4-jm@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20230419223323.20384-1-jm@ti.com> References: <20230419223323.20384-1-jm@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230419_153345_580245_091DE549 X-CRM114-Status: GOOD ( 14.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add an overlay for main domain MCAN on AM62x SK. The AM62x SK board does not have on-board CAN transceiver so instead of changing the DTB permanently, add an overlay to enable MAIN domain MCAN and support for 1 CAN transceiver. Signed-off-by: Judith Mendez --- arch/arm64/boot/dts/ti/Makefile | 2 ++ .../boot/dts/ti/k3-am625-sk-mcan-main.dtso | 35 +++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso diff --git a/arch/arm64/boot/dts/ti/Makefile b/arch/arm64/boot/dts/ti/Makefile index c83c9d772b81..abe15e76b614 100644 --- a/arch/arm64/boot/dts/ti/Makefile +++ b/arch/arm64/boot/dts/ti/Makefile @@ -9,8 +9,10 @@ # alphabetically. # Boards with AM62x SoC +k3-am625-sk-mcan-dtbs := k3-am625-sk.dtb k3-am625-sk-mcan-main.dtbo dtb-$(CONFIG_ARCH_K3) += k3-am625-beagleplay.dtb dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb +dtb-$(CONFIG_ARCH_K3) += k3-am625-sk-mcan.dtb dtb-$(CONFIG_ARCH_K3) += k3-am62-lp-sk.dtb # Boards with AM62Ax SoC diff --git a/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso new file mode 100644 index 000000000000..72b68fd51121 --- /dev/null +++ b/arch/arm64/boot/dts/ti/k3-am625-sk-mcan-main.dtso @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0 +/** + * DT overlay for MCAN transceiver in main domain on AM625 SK + * + * Copyright (C) 2022 Texas Instruments Incorporated - https://www.ti.com/ + */ + +/dts-v1/; +/plugin/; + +#include + +&{/} { + transceiver1: can-phy0 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; +}; + +&main_pmx0 { + main_mcan0_pins_default: main-mcan0-pins-default { + pinctrl-single,pins = < + AM62X_IOPAD(0x1dc, PIN_INPUT, 0) /* (E15) MCAN0_RX */ + AM62X_IOPAD(0x1d8, PIN_OUTPUT, 0) /* (C15) MCAN0_TX */ + >; + }; +}; + +&main_mcan0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&main_mcan0_pins_default>; + phys = <&transceiver1>; +};