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bh=JAX1fjmfBWI5Iew7C17ekaAOJQ1f2iQJMkxaSn3l/sg=; b=YrhEMgMJAW1I+JkWNqsmUBg5HvW2rtLG/QPsgUI6MsX7udGQeCIX7hOc JMhnIa4PAvNfUkYoDIeU7jHJC6hzGSt4ZuuOKtnJHWoddBhMGgRpItD2S j+dEHJ/JSXrsXtHan/IP9lJINgCofGeT4+gENbMClez4YBrpIGjz8jZYd qS/XlariHQeHINSJbKxgZaQtQX23taB4gUyP4B3dmAsbklSMCpUuPTmkr LrLksp57HyOo2yfcj92Uxke3E+lWKx8o+oPxNlHwthh5vvxG4uHrdNZ4Z aMB7z+Iijw0vebgsyK3yJj4K86xNPgSgsvPZ8hYeZURD5usqqTZ7GTboK g==; X-IronPort-AV: E=Sophos;i="5.99,222,1677538800"; d="scan'208";a="30508607" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 24 Apr 2023 10:21:14 +0200 Received: from steina-w.tq-net.de (unknown [10.123.53.21]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 78F35280072; Mon, 24 Apr 2023 10:21:14 +0200 (CEST) From: Alexander Stein To: Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6n?= =?utf-8?q?ig?= , Rob Herring , Krzysztof Kozlowski , Shawn Guo , Sascha Hauer , Fabio Estevam , Philipp Zabel Cc: Alexander Stein , Pengutronix Kernel Team , NXP Linux Team , linux-pwm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 2/2] arm64: dts: imx8qxp: add adma_pwm in adma Date: Mon, 24 Apr 2023 10:21:08 +0200 Message-Id: <20230424082108.26512-2-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230424082108.26512-1-alexander.stein@ew.tq-group.com> References: <20230424082108.26512-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230424_012120_260108_692225A8 X-CRM114-Status: GOOD ( 11.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add PWM device and the corresponding clock gating device in adma subsystem. Signed-off-by: Alexander Stein --- * New in v2 .../arm64/boot/dts/freescale/imx8-ss-dma.dtsi | 25 +++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi index 2dce8f2ee3ea..7d5f96c99020 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi @@ -124,6 +124,19 @@ lpuart3: serial@5a090000 { status = "disabled"; }; + adma_pwm: pwm@5a190000 { + compatible = "fsl,imx8qxp-pwm", "fsl,imx27-pwm"; + reg = <0x5a190000 0x1000>; + interrupts = ; + clocks = <&adma_pwm_lpcg 1>, + <&adma_pwm_lpcg 0>; + clock-names = "ipg", "per"; + assigned-clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>; + }; + spi0_lpcg: clock-controller@5a400000 { compatible = "fsl,imx8qxp-lpcg"; reg = <0x5a400000 0x10000>; @@ -220,6 +233,18 @@ uart3_lpcg: clock-controller@5a490000 { power-domains = <&pd IMX_SC_R_UART_3>; }; + adma_pwm_lpcg: clock-controller@5a590000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5a590000 0x10000>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_LCD_0_PWM_0 IMX_SC_PM_CLK_PER>, + <&dma_ipg_clk>; + clock-indices = , ; + clock-output-names = "adma_pwm_lpcg_clk", + "adma_pwm_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_LCD_0_PWM_0>; + }; + i2c0: i2c@5a800000 { reg = <0x5a800000 0x4000>; interrupts = ;