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Fri, 28 Apr 2023 08:22:05 -0700 (PDT) Received: from localhost ([135.180.227.0]) by smtp.gmail.com with ESMTPSA id y7-20020a056a00190700b0063f1430dd57sm13135014pfi.49.2023.04.28.08.22.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Apr 2023 08:22:05 -0700 (PDT) Subject: [PATCH 2/2] media: nxp: imx8-isi: Fix undefined config warnings Date: Fri, 28 Apr 2023 08:21:56 -0700 Message-Id: <20230428152156.22840-3-palmer@rivosinc.com> X-Mailer: git-send-email 2.40.0 In-Reply-To: <20230428152156.22840-1-palmer@rivosinc.com> References: <20230428152156.22840-1-palmer@rivosinc.com> MIME-Version: 1.0 Cc: laurent.pinchart@ideasonboard.com, shawnguo@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-media@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux@rivosinc.com, Palmer Dabbelt From: Palmer Dabbelt To: mchehab@kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230428_082208_765677_B7A2CCFC X-CRM114-Status: GOOD ( 11.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Palmer Dabbelt These show up as warnings related to the implicit 0 for undefined macros. Signed-off-by: Palmer Dabbelt --- drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c index db538f3d88ec..6d3417bf72cf 100644 --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c @@ -30,7 +30,7 @@ static inline void mxc_isi_write(struct mxc_isi_pipe *pipe, u32 reg, u32 val) void mxc_isi_channel_set_inbuf(struct mxc_isi_pipe *pipe, dma_addr_t dma_addr) { mxc_isi_write(pipe, CHNL_IN_BUF_ADDR, dma_addr); -#if CONFIG_ARCH_DMA_ADDR_T_64BIT +#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) if (pipe->isi->pdata->has_36bit_dma) mxc_isi_write(pipe, CHNL_IN_BUF_XTND_ADDR, dma_addr >> 32); #endif @@ -48,7 +48,7 @@ void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe, mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_Y, dma_addrs[0]); mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_U, dma_addrs[1]); mxc_isi_write(pipe, CHNL_OUT_BUF1_ADDR_V, dma_addrs[2]); -#if CONFIG_ARCH_DMA_ADDR_T_64BIT +#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) if (pipe->isi->pdata->has_36bit_dma) { mxc_isi_write(pipe, CHNL_Y_BUF1_XTND_ADDR, dma_addrs[0] >> 32); @@ -63,7 +63,7 @@ void mxc_isi_channel_set_outbuf(struct mxc_isi_pipe *pipe, mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_Y, dma_addrs[0]); mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_U, dma_addrs[1]); mxc_isi_write(pipe, CHNL_OUT_BUF2_ADDR_V, dma_addrs[2]); -#if CONFIG_ARCH_DMA_ADDR_T_64BIT +#if defined(CONFIG_ARCH_DMA_ADDR_T_64BIT) if (pipe->isi->pdata->has_36bit_dma) { mxc_isi_write(pipe, CHNL_Y_BUF2_XTND_ADDR, dma_addrs[0] >> 32);