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Tue, 23 May 2023 00:15:55 -0700 (PDT) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id x15-20020a5d490f000000b00306299be5a2sm10096239wrq.72.2023.05.23.00.15.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 23 May 2023 00:15:55 -0700 (PDT) From: Neil Armstrong Date: Tue, 23 May 2023 09:15:48 +0200 Subject: [PATCH v3 4/6] arm64: dts: qcom: sm8450-hdk: Add QMP & DP to SuperSpeed graph MIME-Version: 1.0 Message-Id: <20230503-topic-sm8450-graphics-dp-next-v3-4-6c43d293995f@linaro.org> References: <20230503-topic-sm8450-graphics-dp-next-v3-0-6c43d293995f@linaro.org> In-Reply-To: <20230503-topic-sm8450-graphics-dp-next-v3-0-6c43d293995f@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Catalin Marinas , Will Deacon Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Neil Armstrong X-Mailer: b4 0.12.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230523_001557_825721_27F658CD X-CRM114-Status: GOOD ( 12.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org With support for the QMP combo phy to react to USB Type-C switch events, introduce it as the next hop for the SuperSpeed lanes of the Type-C connector, and connect the output of the DisplayPort controller to the QMP combo phy. This allows the TCPM to perform orientation switching of both USB and DisplayPort signals. Signed-off-by: Neil Armstrong --- arch/arm64/boot/dts/qcom/sm8450-hdk.dts | 73 ++++++++++++++++++++++++++++++++- 1 file changed, 71 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts index e931545a2cac..d5aeb7319776 100644 --- a/arch/arm64/boot/dts/qcom/sm8450-hdk.dts +++ b/arch/arm64/boot/dts/qcom/sm8450-hdk.dts @@ -114,9 +114,18 @@ port@1 { reg = <1>; pmic_glink_ss_in: endpoint { - remote-endpoint = <&usb_1_dwc3_ss>; + remote-endpoint = <&usb_1_qmpphy_out>; }; }; + + port@2 { + reg = <2>; + + pmic_glink_sbu: endpoint { + remote-endpoint = <&fsa4480_sbu_mux>; + }; + }; + }; }; }; @@ -494,6 +503,37 @@ lt9611_out: endpoint { }; }; +&i2c5 { + clock-frequency = <100000>; + + status = "okay"; + + typec-mux@42 { + compatible = "fcs,fsa4480"; + reg = <0x42>; + + interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; + + vcc-supply = <&vreg_bob>; + mode-switch; + orientation-switch; + svid = /bits/ 16 <0xff01>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + fsa4480_sbu_mux: endpoint { + remote-endpoint = <&pmic_glink_sbu>; + }; + }; + }; + }; +}; + &mdss { status = "okay"; }; @@ -513,6 +553,21 @@ &mdss_dsi0_phy { status = "okay"; }; +&mdss_dp0 { + status = "okay"; + + ports { + port@1 { + reg = <1>; + + mdss_dp0_out: endpoint { + data-lanes = <0 1>; + remote-endpoint = <&usb_1_qmpphy_dp_in>; + }; + }; + }; +}; + &mdss_mdp { status = "okay"; }; @@ -766,7 +821,7 @@ &usb_1_dwc3_hs { }; &usb_1_dwc3_ss { - remote-endpoint = <&pmic_glink_ss_in>; + remote-endpoint = <&usb_1_qmpphy_usb_ss_in>; }; &usb_1_hsphy { @@ -782,6 +837,20 @@ &usb_1_qmpphy { vdda-phy-supply = <&vreg_l6b_1p2>; vdda-pll-supply = <&vreg_l1b_0p91>; + + orientation-switch; +}; + +&usb_1_qmpphy_dp_in { + remote-endpoint = <&mdss_dp0_out>; +}; + +&usb_1_qmpphy_out { + remote-endpoint = <&pmic_glink_ss_in>; +}; + +&usb_1_qmpphy_usb_ss_in { + remote-endpoint = <&usb_1_dwc3_ss>; }; &vamacro {