From patchwork Thu May 25 12:55:58 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13255215 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 14AF7C7EE2D for ; Thu, 25 May 2023 12:57:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=DqNUohZnbLkaHdeiSI70lNzY34y8x4a05kUm12AAfdI=; b=meYNFNIVbVCJRE 7t3y+ilVb9zBmGqonWCwmgK7snjPpJ0v5HX2dzGiz7UwVyf9poWoZd5TVM+V4xzJn8BXpDPI13XbP R7YG2I59lSblEAd/1BCcC2CSCD0VDvPM32B7PT2uTx4x6iKd/bx1X7U0J0FRdU4aIyaMg5j4BZKjS WmJXvs+JC7AkBDHi/oDjKryrXEvuWlUiLQVny/8PL5+kZCCcbYOIt3xSRlHaqbmG34l29rvrNi37y jJZ0IkVu8/3nxHpQ+JH1fUATwCnHdvEAVwC7rsStTgZyDVrBbJJkO4CqpUUkMN3ZPilTsWTSAr/0f VK9Lx46I/+ICbLcMwgTA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q2AWj-00GfW8-32; Thu, 25 May 2023 12:57:09 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q2AWd-00GfRs-10 for linux-arm-kernel@lists.infradead.org; Thu, 25 May 2023 12:57:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1685019423; x=1716555423; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=UikTxPTMS4kWoru+c9xlmXkh9gf6wCiMAK/SmT/FiLU=; b=oOaZZSToF8rFTADuFnWLFkVyTH8G/hRjC83vHPpYZ6JmlIpquS20JqQh Rp85IKz4Llyz9t9xXFAqkYvM+cG45N9465y7b501ZD4CSHyjmhtEgyHCf hRwyHJXDzIsusc7vXXidtf9K0kAwLFXqdgAMROFbcpjnWxRU206cdW5aX r70gqFKpLK1srNX06H12Y1PxH1iRNHHHj0abgRHOb6Zfexlor5J2NO0wS 2nRYHWtKTsXfmstbZ1F3taJ1VV9ZQrN7L0yqbVtQYeCGCq/plA8cH2sTj 0xv7zxYpLRB3MNvbS5SfShOy1Ccbqb46aD3GGGP2Sc3lsLmyyluQO/W16 A==; X-IronPort-AV: E=Sophos;i="6.00,191,1681196400"; d="scan'208";a="217255331" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 25 May 2023 05:56:58 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Thu, 25 May 2023 05:56:56 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Thu, 25 May 2023 05:56:50 -0700 From: Claudiu Beznea To: , , , , , , , , , CC: , , , , "Claudiu Beznea" Subject: [PATCH 1/5] dt-bindings: timer: atmel,at91sam9260-pit: convert to yaml Date: Thu, 25 May 2023 15:55:58 +0300 Message-ID: <20230525125602.640855-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230525125602.640855-1-claudiu.beznea@microchip.com> References: <20230525125602.640855-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230525_055703_418893_D9E59725 X-CRM114-Status: GOOD ( 15.44 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert Atmel PIT to YAML. Along with it clock binding has been added as the driver enables it to ensure proper hardware functionality. Signed-off-by: Claudiu Beznea --- .../devicetree/bindings/arm/atmel-sysregs.txt | 6 --- .../bindings/timer/atmel,at91sam9260-pit.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 6 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 67a66bf74895..7024839c5da2 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -4,12 +4,6 @@ Chipid required properties: - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid" - reg : Should contain registers location and length -PIT Timer required properties: -- compatible: Should be "atmel,at91sam9260-pit" -- reg: Should contain registers location and length -- interrupts: Should contain interrupt for the PIT which is the IRQ line - shared across all System Controller members. - PIT64B Timer required properties: - compatible: Should be "microchip,sam9x60-pit64b" - reg: Should contain registers location and length diff --git a/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml new file mode 100644 index 000000000000..f304cd68acd5 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/atmel,at91sam9260-pit.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel Periodic Interval Timer (PIT) + +maintainers: + - Claudiu Beznea + +description: + Atmel periodic interval timer provides the operating system’s scheduler + interrupt. It is designed to offer maximum accuracy and efficient management, + even for systems with long response time. + +properties: + compatible: + const: atmel,at91sam9260-pit + + reg: + maxItems: 1 + + interrupts: + description: + Contain interrupt for the PIT which is the IRQ line shared across all + System Controller members. + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + + pit: timer@fffffe40 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffe40 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; + }; +...