From patchwork Tue May 30 09:07:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 13259547 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 67823C77B7A for ; Tue, 30 May 2023 09:08:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=SuYBn/baelEcBJNpVh+aEgTo+OAGP0S+M/F+LIeVp88=; b=rWNLJyz0AY9z8Z 3IWfDQ2GlrtlT+chPj6G2U8JH1cDK5FRU49gS5LatVDCJiKQoY1MyhB2+UVddgcbB7SoqZ7nMNLPg uaIxmCpVbFCjpzZhK2O43C6uRpn+X+YO+86yIfsCP4OVgjIjB+Pp9hH7D8lwzdBCx/mf5+GVExas/ wdTKbyS1iJYVDJ/Arl8NP6kVXYsNo6eoSuqY3kY30E4y66ZVQBWOEIlFt9Zm7DkP6dWPLf8toBWK4 b5hlVANc1Z8vPQfqMqeLcrRnNKatp8EPYvWwBwa6rJjWvbZNNnCIPJQRx7s/U8dfWnJUTzeUD7WMa UHVVsVt8JBqTK62PZ1mQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q3vLE-00D5Qb-2C; Tue, 30 May 2023 09:08:32 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q3vL3-00D5Jc-2l for linux-arm-kernel@lists.infradead.org; Tue, 30 May 2023 09:08:24 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1685437702; x=1716973702; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=KDOtiesl3EnNNfJv3nhJSpdEkmq96eW6+SiGHrWHxNY=; b=q7rUAl/9q+JC/H66EEdvB1aAZo8+K7GYJjUBYd0BwbqfEELaCJGsQ6Vg RKBVfkfHiPpaIfxM5i/zUrjFUbZPLYk+6HH/d1iewWp0LYAsl4IW8e1Rq JkkotyEoab33Wheyq0e3PzV6eHG22Zow/ObeY30nzStEm3oR2edQ45Dqm zMDaq75jRp94fNjo5Z5/dIC0NNFVp3Ih97jUxxYMKH2M/eKD7ABF5GQpO qA6eQhlLlkDxGCwZHd5SiTOZWELkkKFRnXEqWEq6SHwQ2wGJz7E+6IOFJ Z+d68ED9bG6NUyRSeYlx9WMAJVHWO4IaEYfKz6qUDJ1NdtBgUraGz9E7s w==; X-IronPort-AV: E=Sophos;i="6.00,203,1681196400"; d="scan'208";a="213680031" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 30 May 2023 02:08:18 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.21; Tue, 30 May 2023 02:08:16 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.21 via Frontend Transport; Tue, 30 May 2023 02:08:12 -0700 From: Claudiu Beznea To: , , , , , , , , CC: , , , , "Claudiu Beznea" Subject: [PATCH v3 1/3] dt-bindings: timer: atmel,at91sam9260-pit: convert to yaml Date: Tue, 30 May 2023 12:07:56 +0300 Message-ID: <20230530090758.1652329-2-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230530090758.1652329-1-claudiu.beznea@microchip.com> References: <20230530090758.1652329-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230530_020821_954106_D46F0B77 X-CRM114-Status: GOOD ( 15.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Convert Microchip AT91 PIT bindings to YAML. Along with it clocks and clock-names bindings were added as the drivers needs it to ensure proper hardware functionality. Signed-off-by: Claudiu Beznea --- .../devicetree/bindings/arm/atmel-sysregs.txt | 12 --- .../bindings/timer/atmel,at91sam9260-pit.yaml | 99 +++++++++++++++++++ 2 files changed, 99 insertions(+), 12 deletions(-) create mode 100644 Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml diff --git a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt index 67a66bf74895..54d3f586403e 100644 --- a/Documentation/devicetree/bindings/arm/atmel-sysregs.txt +++ b/Documentation/devicetree/bindings/arm/atmel-sysregs.txt @@ -4,18 +4,6 @@ Chipid required properties: - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid" - reg : Should contain registers location and length -PIT Timer required properties: -- compatible: Should be "atmel,at91sam9260-pit" -- reg: Should contain registers location and length -- interrupts: Should contain interrupt for the PIT which is the IRQ line - shared across all System Controller members. - -PIT64B Timer required properties: -- compatible: Should be "microchip,sam9x60-pit64b" -- reg: Should contain registers location and length -- interrupts: Should contain interrupt for PIT64B timer -- clocks: Should contain the available clock sources for PIT64B timer. - System Timer (ST) required properties: - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd" - reg: Should contain registers location and length diff --git a/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml new file mode 100644 index 000000000000..d0f3f80db4cb --- /dev/null +++ b/Documentation/devicetree/bindings/timer/atmel,at91sam9260-pit.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/atmel,at91sam9260-pit.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip AT91 Periodic Interval Timer (PIT) + +maintainers: + - Claudiu Beznea + +description: + Microchip AT91 periodic interval timer provides the operating system scheduler + interrupt. It is designed to offer maximum accuracy and efficient management, + even for systems with long response time. + +properties: + compatible: + oneOf: + - items: + - const: microchip,sama7g5-pit64b + - const: microchip,sam9x60-pit64b + - items: + enum: + - atmel,at91sam9260-pit + - microchip,sam9x60-pit64b + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + +required: + - compatible + - reg + - interrupts + - clocks + +allOf: + - if: + properties: + compatible: + contains: + const: atmel,at91sam9260-pit + then: + properties: + interrupts: + description: + Shared interrupt between all system controller members (power management + controller, watchdog, PIT, reset controller, real-time timer, real-time + clock, memory controller, debug unit, system timer). + clocks: + maxItems: 1 + + else: + properties: + clocks: + minItems: 2 + clock-names: + items: + - const: pclk + - const: gclk + required: + - clock-names + +unevaluatedProperties: false + +examples: + - | + /* AT91RM9200 */ + #include + #include + + pit: timer@fffffe40 { + compatible = "atmel,at91sam9260-pit"; + reg = <0xfffffe40 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_CORE PMC_MCK>; + }; + + - | + /* SAM9X60 */ + #include + #include + + pit64b: timer@f0028000 { + compatible = "microchip,sam9x60-pit64b"; + reg = <0xf0028000 0x100>; + interrupts = <37 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 37>, <&pmc PMC_TYPE_GCK 37>; + clock-names = "pclk", "gclk"; + }; + +...