Message ID | 20230530165900.47502-5-nm@ti.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | arm64: dts: ti: Add additional secproxy instances | expand |
Hi Nishanth On 5/30/2023 10:28 PM, Nishanth Menon wrote: > MCU domain has it's own secure proxy for communicating with ROM and > for R5 micro controller firmware operations. This is in addition to > the one in the main domain NAVSS subsystem that is used for general > purpose communication. > > Describe the node for use with bootloaders and firmware that require > this communication path which uses interrupts to corresponding micro > controller interrupt controller. Mark the node as disabled since this > instance does not have interrupts routed to the main processor by > default for a complete description of the node. > > Signed-off-by: Nishanth Menon <nm@ti.com> > --- > New patch > > arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > index 674e695ef844..dff23b258240 100644 > --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi > @@ -209,6 +209,21 @@ mcu_udmap: dma-controller@285c0000 { > }; > }; > > + secure_proxy_mcu: mailbox@2a480000 { I think, we should start name as mailbox@2a380000 > + compatible = "ti,am654-secure-proxy"; > + #mbox-cells = <1>; > + reg-names = "target_data", "rt", "scfg"; > + reg = <0x0 0x2a480000 0x0 0x80000>, > + <0x0 0x2a380000 0x0 0x80000>, > + <0x0 0x2a400000 0x0 0x80000>; I think, we should have increasing order for reg. Unless there is some strong reason to keep in this way. > + /* > + * Marked Disabled: > + * Node is incomplete as it is meant for bootloaders and > + * firmware on non-MPU processors > + */ > + status = "disabled"; > + }; > + > mcu_cpsw: ethernet@46000000 { > compatible = "ti,j721e-cpsw-nuss"; > #address-cells = <2>;
On 5/31/2023 11:09 PM, Nishanth Menon wrote: > On 22:37-20230531, Kumar, Udit wrote: > [...] >>> + secure_proxy_mcu: mailbox@2a480000 { >> I think, we should start name as mailbox@2a380000 >>> + compatible = "ti,am654-secure-proxy"; >>> + #mbox-cells = <1>; >>> + reg-names = "target_data", "rt", "scfg"; >>> + reg = <0x0 0x2a480000 0x0 0x80000>, >>> + <0x0 0x2a380000 0x0 0x80000>, >>> + <0x0 0x2a400000 0x0 0x80000>; >> I think, we should have increasing order for reg. Unless there is some >> strong reason to keep in this way. > Binding is defined this way - the items section in the binding > enforces the order. As a result the first reg entry(target_data) > address causes the node name. Ok thanks, u boot defined in other way but i don't see problem post sync, As u-boot driver is getting node address based upon name instead of index. Reviewed-by: Udit Kumar <u-kumar1@ti.com>
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi index 674e695ef844..dff23b258240 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi @@ -209,6 +209,21 @@ mcu_udmap: dma-controller@285c0000 { }; }; + secure_proxy_mcu: mailbox@2a480000 { + compatible = "ti,am654-secure-proxy"; + #mbox-cells = <1>; + reg-names = "target_data", "rt", "scfg"; + reg = <0x0 0x2a480000 0x0 0x80000>, + <0x0 0x2a380000 0x0 0x80000>, + <0x0 0x2a400000 0x0 0x80000>; + /* + * Marked Disabled: + * Node is incomplete as it is meant for bootloaders and + * firmware on non-MPU processors + */ + status = "disabled"; + }; + mcu_cpsw: ethernet@46000000 { compatible = "ti,j721e-cpsw-nuss"; #address-cells = <2>;
MCU domain has it's own secure proxy for communicating with ROM and for R5 micro controller firmware operations. This is in addition to the one in the main domain NAVSS subsystem that is used for general purpose communication. Describe the node for use with bootloaders and firmware that require this communication path which uses interrupts to corresponding micro controller interrupt controller. Mark the node as disabled since this instance does not have interrupts routed to the main processor by default for a complete description of the node. Signed-off-by: Nishanth Menon <nm@ti.com> --- New patch arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+)