From patchwork Thu Jun 1 12:09:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 13263660 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id ACF4AC77B7E for ; Thu, 1 Jun 2023 12:30:29 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=UNCQXxUPrCFhA+mszt75GshUoMo3NaRa3afJ+prUN2I=; b=RqU0Pjkba9rqak EiwCO+15lTKqNvwfJjtQ3gdqJiygb6tPKl2SpsUdYeMDmJKChwQ2mP1nirJeU89+Tt6jQRsZbqdtF aWedH65Ihi8FiU4+XdFfZ+NgdCA5rqDqgnykIsH+g1Z+k8oKaij/SR8V7HA4IdVWj2kf1OALOoCLl VPP4LbBbqZ6dL3xwL/DGheR9o24EGczedsGY3lKNmYdBMAfLQWjb8eo3kMKZa3O9j46eKHfhUQ8MN zkNNAhBXy2EXX+WkY5nvUNLZ2UPPjOWL9HnNKTpDRHLK6nsj5Cmj0YlnyrpTUtkpXcyWwtn78VYow HcH/k3m/iLfVurzK1OkA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q4hRK-003WsE-0v; Thu, 01 Jun 2023 12:30:02 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q4h8L-003Nxl-35 for linux-arm-kernel@lists.infradead.org; Thu, 01 Jun 2023 12:10:27 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 87C5361D6F; Thu, 1 Jun 2023 12:10:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id CDFB2C433EF; Thu, 1 Jun 2023 12:10:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685621425; bh=PEcdZVhDuhBQ+xzAg//irJiyn8poLhX+cHlMc0n1u9w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AceQvPqRM3KtwlgBB5UkRQbl23xq46V7w8u3OwmU6aIrg9u2A62nZGZqxv9Gxn3/j sUDJgsIcdKhl0IHak3JXYxLL0pi2bIvIBu6f+2wk3Z/GvE3ZCraPlnKp9pDbblONYI /ZTpP312891+mBwMGF3SvOAp19x9RJkGSHP+umt4j2eP4iaqTbQv9VIX90mY9w4MPv DRiPoIRK+RenTigsgxon9ZuF38xV/MyW5xwBCpmggPwQZMdzX7VnM9Og0A2neWmHwu W7XOmmrJoabLtV2kTGz2QCfsDBvatNbG8XVKoPxoyOI3yc+ryRtL/Y6RLa60LoWn2g MW62ColJsDfWQ== From: Masahiro Yamada To: linux-kbuild@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Ard Biesheuvel , linux-arm-kernel@lists.infradead.org, Russell King , Masahiro Yamada , Nathan Chancellor , Nick Desaulniers , Nicolas Schier , Russell King , Rusty Russell , Sam Ravnborg , Tony Lindgren Subject: [PATCH 2/7] modpost: fix section mismatch message for R_ARM_{PC24,CALL,JUMP24} Date: Thu, 1 Jun 2023 21:09:56 +0900 Message-Id: <20230601121001.1071533-3-masahiroy@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230601121001.1071533-1-masahiroy@kernel.org> References: <20230601121001.1071533-1-masahiroy@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230601_051026_079750_21F008F6 X-CRM114-Status: GOOD ( 14.29 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org addend_arm_rel() processes R_ARM_PC24, R_ARM_CALL, R_ARM_JUMP24 in a wrong way. Here, test code. [test code for R_ARM_JUMP24] .section .init.text,"ax" bar: bx lr .section .text,"ax" .globl foo foo: b bar [test code for R_ARM_CALL] .section .init.text,"ax" bar: bx lr .section .text,"ax" .globl foo foo: push {lr} bl bar pop {pc} If you compile it with ARM multi_v7_defconfig, modpost will show the symbol name, (unknown). WARNING: modpost: vmlinux.o: section mismatch in reference: foo (section: .text) -> (unknown) (section: .init.text) (You need to use GNU linker instead of LLD to reproduce it.) Fix the code to make modpost show the correct symbol name. I imported (with adjustment) sign_extend32() from include/linux/bitops.h. The '+8' is the compensation for pc-relative instruction. It is documented in "ELF for the Arm Architecture" [1]. "If the relocation is pc-relative then compensation for the PC bias (the PC value is 8 bytes ahead of the executing instruction in Arm state and 4 bytes in Thumb state) must be encoded in the relocation by the object producer." [1]: https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst Fixes: 56a974fa2d59 ("kbuild: make better section mismatch reports on arm") Fixes: 6e2e340b59d2 ("ARM: 7324/1: modpost: Fix section warnings for ARM for many compilers") Signed-off-by: Masahiro Yamada --- scripts/mod/modpost.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c index c68dad45ace2..e47bba7cfad2 100644 --- a/scripts/mod/modpost.c +++ b/scripts/mod/modpost.c @@ -1277,12 +1277,20 @@ static int addend_386_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) #define R_ARM_THM_JUMP19 51 #endif +static int32_t sign_extend32(int32_t value, int index) +{ + uint8_t shift = 31 - index; + + return (int32_t)(value << shift) >> shift; +} + static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) { unsigned int r_typ = ELF_R_TYPE(r->r_info); Elf_Sym *sym = elf->symtab_start + ELF_R_SYM(r->r_info); void *loc = reloc_location(elf, sechdr, r); uint32_t inst; + int32_t offset; switch (r_typ) { case R_ARM_ABS32: @@ -1292,6 +1300,10 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) case R_ARM_PC24: case R_ARM_CALL: case R_ARM_JUMP24: + inst = TO_NATIVE(*(uint32_t *)loc); + offset = sign_extend32((inst & 0x00ffffff) << 2, 25); + r->r_addend = offset + sym->st_value + 8; + break; case R_ARM_THM_CALL: case R_ARM_THM_JUMP24: case R_ARM_THM_JUMP19: