From patchwork Thu Jun 1 12:10:00 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Masahiro Yamada X-Patchwork-Id: 13263675 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E1097C77B7A for ; Thu, 1 Jun 2023 12:31:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BZqDaxyTzALZd3iUOh+Ecyv2Y9BX12ftFVaZVwwr3PE=; b=CCnk3R/8Onouoa Ky4rbdvQaVMO7E5LTUb/NowHX+kvj9QgEFCQ7zAykXx1wYLRTaH3osaSVL9cuxtIlSaIOE+lbs+ru AjpX4jURNqirZm96+7fsPeJhhAzpHNAGDfjL8O1HE0ervvwa5qnETQxJs/lEtSxPBgbKGf5ZhixYa GZR+WLJM4cJVAjgZpRzxx1OINiM1bWudzWjOJNyVV8wPHQt6z5ifxwvEYERZlKxEeYwHAhQ686tFJ ZMkZFWb/LNl3NoJTaDp2LrlMilWnbfYr+bHm4ifhn/UaydicKBZF3w/meIzEBA/rEn/FyXDOeDLLq yhveUeLuJG2pJ5XLJxrQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q4hRv-003XWI-0O; Thu, 01 Jun 2023 12:30:39 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q4h8V-003O6N-0o for linux-arm-kernel@lists.infradead.org; Thu, 01 Jun 2023 12:10:41 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D79D66416C; Thu, 1 Jun 2023 12:10:34 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1DCA2C433A4; Thu, 1 Jun 2023 12:10:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685621434; bh=eRGe47kX3cGM5w4r8Dems50P7VdGPg3OOcR4aC02b70=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q8NKzkee9vISUaZPJodekn7NPcjTrI7T4bZTLzyDUPhJPCb/VPXyphc66ouv2Ccqv x9KwiLJsSMx0NJa1lQynQ7F5ckRdFc45kCK/rzI/I+uPAsZd5gLLgQ5LS61xSOJX5i 2KMSa3pPcU8TjwFyxQul8yT4Bw/bFQHpSTxPXCCpo86tFbTi4d0blMBWVRAfimemUY nXNHvmbcUuktNWNcjr1nvh1Ny9lYyI+eC03OxqMdkMJeJQfP9JMtWNs4bOY19xXJ/t L8IiodTAQOPzflB4mGhCKNEKBhdvpgN4Cywsl0flQMC6sYvGrCtnKJmIWEVoOw2noA RVFF8L9HCvfVw== From: Masahiro Yamada To: linux-kbuild@vger.kernel.org Cc: linux-kernel@vger.kernel.org, Ard Biesheuvel , linux-arm-kernel@lists.infradead.org, Russell King , Masahiro Yamada , "David A. Long" , Nathan Chancellor , Nick Desaulniers , Nicolas Schier , Russell King , Rusty Russell Subject: [PATCH 6/7] modpost: fix section_mismatch message for R_ARM_THM_{CALL,JUMP24,JUMP19} Date: Thu, 1 Jun 2023 21:10:00 +0900 Message-Id: <20230601121001.1071533-7-masahiroy@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230601121001.1071533-1-masahiroy@kernel.org> References: <20230601121001.1071533-1-masahiroy@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230601_051037_322284_AC250B2A X-CRM114-Status: GOOD ( 16.86 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org addend_arm_rel() processes R_ARM_THM_CALL, R_ARM_THM_JUMP24, R_ARM_THM_JUMP19 in a wrong way. Here, test code. [test code for R_ARM_THM_JUMP24]   .section .init.text,"ax"   bar:           bx      lr   .section .text,"ax"   .globl foo   foo:           b       bar [test code for R_ARM_THM_CALL]   .section .init.text,"ax"   bar:           bx      lr   .section .text,"ax"   .globl foo   foo:           push    {lr}           bl      bar           pop     {pc} If you compile it with CONFIG_THUMB2_KERNEL=y, modpost will show the symbol name, (unknown).   WARNING: modpost: vmlinux.o: section mismatch in reference: foo (section: .text) -> (unknown) (section: .init.text) (You need to use GNU linker instead of LLD to reproduce it.) Fix the code to make modpost show the correct symbol name. I checked arch/arm/kernel/module.c to learn the encoding of R_ARM_THM_CALL and R_ARM_THM_JUMP24. The module does not support R_ARM_THM_JUMP19, but I checked its encoding in ARM ARM. The '+4' is the compensation for pc-relative instruction. It is documented in "ELF for the Arm Architecture" [1].   "If the relocation is pc-relative then compensation for the PC bias   (the PC value is 8 bytes ahead of the executing instruction in Arm   state and 4 bytes in Thumb state) must be encoded in the relocation   by the object producer." [1]: https://github.com/ARM-software/abi-aa/blob/main/aaelf32/aaelf32.rst Fixes: c9698e5cd6ad ("ARM: 7964/1: Detect section mismatches in thumb relocations") Signed-off-by: Masahiro Yamada --- scripts/mod/modpost.c | 53 ++++++++++++++++++++++++++++++++++++++----- 1 file changed, 47 insertions(+), 6 deletions(-) diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c index 528aa9175e84..55d142bb000b 100644 --- a/scripts/mod/modpost.c +++ b/scripts/mod/modpost.c @@ -1276,7 +1276,7 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) unsigned int r_typ = ELF_R_TYPE(r->r_info); Elf_Sym *sym = elf->symtab_start + ELF_R_SYM(r->r_info); void *loc = reloc_location(elf, sechdr, r); - uint32_t inst, upper, lower; + uint32_t inst, upper, lower, sign, j1, j2; int32_t offset; switch (r_typ) { @@ -1309,13 +1309,54 @@ static int addend_arm_rel(struct elf_info *elf, Elf_Shdr *sechdr, Elf_Rela *r) 15); r->r_addend = offset + sym->st_value; break; + case R_ARM_THM_JUMP19: + /* + * Encoding T3: + * S = upper[10] + * imm6 = upper[5:0] + * J1 = lower[13] + * J2 = lower[11] + * imm11 = lower[10:0] + * imm32 = SignExtend(S:J2:J1:imm6:imm11:'0') + */ + upper = TO_NATIVE(*(uint16_t *)loc); + lower = TO_NATIVE(*((uint16_t *)loc + 1)); + + sign = (upper >> 10) & 1; + j1 = (lower >> 13) & 1; + j2 = (lower >> 11) & 1; + offset = sign_extend32((sign << 20) | (j2 << 19) | (j1 << 18) | + ((upper & 0x03f) << 12) | + ((lower & 0x07ff) << 1), + 20); + r->r_addend = offset + sym->st_value + 4; + break; case R_ARM_THM_CALL: case R_ARM_THM_JUMP24: - case R_ARM_THM_JUMP19: - /* From ARM ABI: ((S + A) | T) - P */ - r->r_addend = (int)(long)(elf->hdr + - sechdr->sh_offset + - (r->r_offset - sechdr->sh_addr)); + /* + * Encoding T4: + * S = upper[10] + * imm10 = upper[9:0] + * J1 = lower[13] + * J2 = lower[11] + * imm11 = lower[10:0] + * I1 = NOT(J1 XOR S) + * I2 = NOT(J2 XOR S) + * imm32 = SignExtend(S:I1:I2:imm10:imm11:'0') + */ + upper = TO_NATIVE(*(uint16_t *)loc); + lower = TO_NATIVE(*((uint16_t *)loc + 1)); + + sign = (upper >> 10) & 1; + j1 = (lower >> 13) & 1; + j2 = (lower >> 11) & 1; + offset = sign_extend32((sign << 24) | + ((~(j1 ^ sign) & 1) << 23) | + ((~(j2 ^ sign) & 1) << 22) | + ((upper & 0x03ff) << 12) | + ((lower & 0x07ff) << 1), + 24); + r->r_addend = offset + sym->st_value + 4; break; default: return 1;