diff mbox series

arm64: dts: imx8mp: don't initialize audio clocks from CCM node

Message ID 20230602191013.4124840-1-l.stach@pengutronix.de (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mp: don't initialize audio clocks from CCM node | expand

Commit Message

Lucas Stach June 2, 2023, 7:10 p.m. UTC
The audio clocks should be intitialized to the correct rate by the subsystem
using them. There is no need to always initialize them from the CCM node
assigned-clocks property. This way boards using the audio clocks in a non-
standard way can change them without first duplicating the CCM clock
setup.

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm64/boot/dts/freescale/imx8mp.dtsi | 16 +++-------------
 1 file changed, 3 insertions(+), 13 deletions(-)

Comments

Shawn Guo June 9, 2023, 2:19 p.m. UTC | #1
On Fri, Jun 02, 2023 at 09:10:13PM +0200, Lucas Stach wrote:
> The audio clocks should be intitialized to the correct rate by the subsystem
> using them. There is no need to always initialize them from the CCM node
> assigned-clocks property. This way boards using the audio clocks in a non-
> standard way can change them without first duplicating the CCM clock
> setup.
> 
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Applied, thanks!
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 428c60462e3d..995445ad54cc 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -534,26 +534,16 @@  clk: clock-controller@30380000 {
 						  <&clk IMX8MP_CLK_A53_CORE>,
 						  <&clk IMX8MP_CLK_NOC>,
 						  <&clk IMX8MP_CLK_NOC_IO>,
-						  <&clk IMX8MP_CLK_GIC>,
-						  <&clk IMX8MP_CLK_AUDIO_AHB>,
-						  <&clk IMX8MP_CLK_AUDIO_AXI_SRC>,
-						  <&clk IMX8MP_AUDIO_PLL1>,
-						  <&clk IMX8MP_AUDIO_PLL2>;
+						  <&clk IMX8MP_CLK_GIC>;
 				assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
 							 <&clk IMX8MP_ARM_PLL_OUT>,
 							 <&clk IMX8MP_SYS_PLL2_1000M>,
 							 <&clk IMX8MP_SYS_PLL1_800M>,
-							 <&clk IMX8MP_SYS_PLL2_500M>,
-							 <&clk IMX8MP_SYS_PLL1_800M>,
-							 <&clk IMX8MP_SYS_PLL1_800M>;
+							 <&clk IMX8MP_SYS_PLL2_500M>;
 				assigned-clock-rates = <0>, <0>,
 						       <1000000000>,
 						       <800000000>,
-						       <500000000>,
-						       <400000000>,
-						       <800000000>,
-						       <393216000>,
-						       <361267200>;
+						       <500000000>;
 			};
 
 			src: reset-controller@30390000 {