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Tue, 6 Jun 2023 14:59:06 +0000 From: Joey Gouly To: CC: , , , , , , , , , , , Subject: [PATCH v4 07/20] arm64: cpufeature: add Permission Indirection Extension cpucap Date: Tue, 6 Jun 2023 15:58:46 +0100 Message-ID: <20230606145859.697944-8-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230606145859.697944-1-joey.gouly@arm.com> References: <20230606145859.697944-1-joey.gouly@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT017:EE_|DU0PR08MB9749:EE_|AM7EUR03FT035:EE_|GV2PR08MB8169:EE_ X-MS-Office365-Filtering-Correlation-Id: ad02698e-d0b8-4bbb-3e09-08db669e9e3c x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: PwvWzcF3fkqeIbZzvlmH5PYTa/A9s7sSP/s/vuVrrovr4CfcD38e1k7ExcEfticzvEYwuJhVEbeUXBAGX5CFCkAS6Lqg6k61RW1kNtnXgc2sPy+3mpIdZpuOLJrwCQtIeCY1XBEKX4ZGFD+fvujWHwI3ohrF/2IFYBwDG28lrDCVnIXzmy5df642mzgxRXMS6tHbZxRHYH7BUw3pt1M9gignxQCkniPam+sfN7BwgR9ODK4zAo6V14Z4P87pv5risDqtkyFijjyhNWtedr9bLDoYDXeXOlBQysPy+NlLe7wokO41/l3BMmzG1FvKWYMKay7e+3/mKc15yxIQTeAhfIO+T2jPdIdzNvIQs7op0CD2BVSm3dRbqOP4yUZEW48ONtyS2WnXzQb+iY4eaicVt6ofuNdYYad9XzYcrKQEPccRFLBQ5yo8wSYiWV573w5hL366tEz/oWEosrrq9FP5hQgT0ZmVuR1/oAuIB21Pzqyrr3fid9IMC23F/wCustJFaid8UKsArg7sgUrj7Yc3lfbX9R0quHvwdKnj1AWj4xS9ZXqgz8zrkdu0QGNcTAdGZhU8/BkPl5xfwRPyvNrzVOSfYNYVk/ZnePPno8W979OBAFVZJMEQmlzAPsCjPTDmCLyNC5rjISr8v+DL3hvxjIgKdVfD/OX/Nrx/XeymsRttZL8RChmYCCQlnDYvG4r8OtP6AdhHXX3glzfLyBjfDtn345+X9Y7yLEOcTTai/CTw8ZO1w39AhabBAtxINYPy5m6YJK9Qqu41hwL5UMhIZXaSnUePTt/VelHgTkTERUWJyALO9gRjGmPCxxFx11JH X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(396003)(376002)(346002)(136003)(39860400002)(451199021)(40470700004)(46966006)(36840700001)(82310400005)(47076005)(336012)(426003)(478600001)(82740400003)(44832011)(40480700001)(8676002)(8936002)(316002)(81166007)(4326008)(70586007)(356005)(70206006)(6916009)(5660300002)(40460700003)(41300700001)(86362001)(36756003)(6666004)(7696005)(2906002)(54906003)(36860700001)(186003)(1076003)(26005)(2616005)(36900700001);DIR:OUT;SFP:1101; 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X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This indicates if the system supports PIE. This is a CPUCAP_BOOT_CPU_FEATURE as the boot CPU will enable PIE if it has it, so secondary CPUs must also have this feature. Signed-off-by: Joey Gouly Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Catalin Marinas Reviewed-by: Mark Brown --- arch/arm64/kernel/cpufeature.c | 7 +++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 8 insertions(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 12107c07fb77..6607a9ae8418 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -2680,6 +2680,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .matches = has_cpuid_feature, ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, TCRX, IMP) }, + { + .desc = "Stage-1 Permission Indirection Extension (S1PIE)", + .capability = ARM64_HAS_S1PIE, + .type = ARM64_CPUCAP_BOOT_CPU_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64MMFR3_EL1, S1PIE, IMP) + }, {}, }; diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index ebf5d4407b64..19c23c4fa2da 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -40,6 +40,7 @@ HAS_NESTED_VIRT HAS_NO_FPSIMD HAS_NO_HW_PREFETCH HAS_PAN +HAS_S1PIE HAS_RAS_EXTN HAS_RNG HAS_SB