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Tue, 6 Jun 2023 14:59:06 +0000 From: Joey Gouly To: CC: , , , , , , , , , , , Subject: [PATCH v4 08/20] KVM: arm64: Save/restore TCR2_EL1 Date: Tue, 6 Jun 2023 15:58:47 +0100 Message-ID: <20230606145859.697944-9-joey.gouly@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230606145859.697944-1-joey.gouly@arm.com> References: <20230606145859.697944-1-joey.gouly@arm.com> MIME-Version: 1.0 X-EOPAttributedMessage: 1 X-MS-TrafficTypeDiagnostic: AM7EUR03FT058:EE_|AS2PR08MB9690:EE_|AM7EUR03FT040:EE_|DU2PR08MB10160:EE_ X-MS-Office365-Filtering-Correlation-Id: 8c98d741-013a-4cfa-8c45-08db669e9dbc x-checkrecipientrouted: true NoDisclaimer: true X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Untrusted: BCL:0; X-Microsoft-Antispam-Message-Info-Original: Q/v2y5mr3QqFnd8J2OOyXqTXxK+gKoLbSv5QmFnQ2LIBxDEwEFXo+wvMUe7OnrVXBYwTtawbD1L5m+U9IAvJ25VHROwAfpZWY27PojmYusHTO9Q7Pu8fODNTmSpWJ+QOuukTyuYNbeuiugIfwY9YfMVz55AZUadQo9FVu5p8m5JXUiEbITNfeZYjGnGcYaN/1YdRaQ7ik3iCCqTrPnifOYrtEIPzI96KqAaIsAY/rOb0NITRiCLi5+x86zTqLI6HRShpJ7KRDXjovel6cGVRuW+KTtNGgz3Lme2oz8/Dq00DsJiGJuKo9khueh1ExlOgXTNCPEVL/N6XlyZO3rREwwMlswGP0w8z9yPnIFKlHm+4Y4bpe0I6k+f3/knSqQDITEHFn8JmcFMtZo+uYJqOrbSbzU/T+lVnUWuInyZyMRy4tdaRmQenSeLKTnUFwzVV2Yi5Y1B93GpKl4U04zVwDoT1xDyb1nf9W4aGf22N1bsDHSK/iQvDBP3P90rMwcO3bt/Zkoh0PtHtsZwU70LdLWD/ADki/LYtwNGGGTU7xRjPoiWBCH8vPY56/g9Eb9v/YfJW3c+ESEbV7K+p94uZMwe6FinBWomWo2MhI9GIv/0kAxbVea7s5/WK83bcye/gxzjaMYQRwfhU0jfDgjPaeqoqza8Hup4ojSUOf/L9tS3gupxZvJ8Ui0M+mwlrqDqFgd+HDR84fTMoG6Ylw7I2PUtSQrC4QPHNcvXNwmVrP2K7hQzMq7zvavK03Xz5t2yMjS5pphFDLtbqtLdBv89EEg== X-Forefront-Antispam-Report-Untrusted: CIP:40.67.248.234;CTRY:IE;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:nebula.arm.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230028)(4636009)(346002)(39860400002)(136003)(396003)(376002)(451199021)(46966006)(36840700001)(40470700004)(40480700001)(40460700003)(83380400001)(54906003)(356005)(82740400003)(478600001)(81166007)(8936002)(8676002)(4326008)(2616005)(6916009)(70586007)(316002)(41300700001)(70206006)(336012)(36860700001)(6666004)(7696005)(186003)(426003)(26005)(1076003)(47076005)(82310400005)(86362001)(5660300002)(2906002)(44832011)(36756003)(36900700001);DIR:OUT;SFP:1101; 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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Jun 2023 14:59:23.9833 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 8c98d741-013a-4cfa-8c45-08db669e9dbc X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: AM7EUR03FT040.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DU2PR08MB10160 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230606_075931_846011_DDF82B70 X-CRM114-Status: GOOD ( 11.09 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Define the new system register TCR2_EL1 and context switch it. Signed-off-by: Joey Gouly Cc: Marc Zyngier Cc: Oliver Upton Cc: James Morse Cc: Suzuki K Poulose Cc: Zenghui Yu Cc: Catalin Marinas Cc: Will Deacon Reviewed-by: Catalin Marinas Reviewed-by: Marc Zyngier --- arch/arm64/include/asm/kvm_host.h | 1 + arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 4 ++++ arch/arm64/kvm/sys_regs.c | 1 + 3 files changed, 6 insertions(+) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 7e7e19ef6993..f2cfb9ef1eeb 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -279,6 +279,7 @@ enum vcpu_sysreg { TTBR0_EL1, /* Translation Table Base Register 0 */ TTBR1_EL1, /* Translation Table Base Register 1 */ TCR_EL1, /* Translation Control Register */ + TCR2_EL1, /* Extended Translation Control Register */ ESR_EL1, /* Exception Syndrome Register */ AFSR0_EL1, /* Auxiliary Fault Status Register 0 */ AFSR1_EL1, /* Auxiliary Fault Status Register 1 */ diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h index 699ea1f8d409..16199a107a47 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -44,6 +44,8 @@ static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) ctxt_sys_reg(ctxt, TTBR0_EL1) = read_sysreg_el1(SYS_TTBR0); ctxt_sys_reg(ctxt, TTBR1_EL1) = read_sysreg_el1(SYS_TTBR1); ctxt_sys_reg(ctxt, TCR_EL1) = read_sysreg_el1(SYS_TCR); + if (cpus_have_final_cap(ARM64_HAS_TCR2)) + ctxt_sys_reg(ctxt, TCR2_EL1) = read_sysreg_el1(SYS_TCR2); ctxt_sys_reg(ctxt, ESR_EL1) = read_sysreg_el1(SYS_ESR); ctxt_sys_reg(ctxt, AFSR0_EL1) = read_sysreg_el1(SYS_AFSR0); ctxt_sys_reg(ctxt, AFSR1_EL1) = read_sysreg_el1(SYS_AFSR1); @@ -114,6 +116,8 @@ static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt) write_sysreg_el1(ctxt_sys_reg(ctxt, CPACR_EL1), SYS_CPACR); write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR0_EL1), SYS_TTBR0); write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR1_EL1), SYS_TTBR1); + if (cpus_have_final_cap(ARM64_HAS_TCR2)) + write_sysreg_el1(ctxt_sys_reg(ctxt, TCR2_EL1), SYS_TCR2); write_sysreg_el1(ctxt_sys_reg(ctxt, ESR_EL1), SYS_ESR); write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR0_EL1), SYS_AFSR0); write_sysreg_el1(ctxt_sys_reg(ctxt, AFSR1_EL1), SYS_AFSR1); diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 6dae7fe91cfa..85aeb2ac0995 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1893,6 +1893,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { { SYS_DESC(SYS_TTBR0_EL1), access_vm_reg, reset_unknown, TTBR0_EL1 }, { SYS_DESC(SYS_TTBR1_EL1), access_vm_reg, reset_unknown, TTBR1_EL1 }, { SYS_DESC(SYS_TCR_EL1), access_vm_reg, reset_val, TCR_EL1, 0 }, + { SYS_DESC(SYS_TCR2_EL1), access_vm_reg, reset_val, TCR2_EL1, 0 }, PTRAUTH_KEY(APIA), PTRAUTH_KEY(APIB),