From patchwork Tue Jun 6 23:12:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: William Zhang X-Patchwork-Id: 13269856 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 423F9C7EE2F for ; Tue, 6 Jun 2023 23:15:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Content-Type: List-Subscribe:List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date :Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=Uy51J4jmRO1AUH5llVpDyQ1z5U4fPt3hJK0v8zo+EtA=; b=Ev/UB8gCuIQySP+CsLhIlKad4H OKMzeD4Bey+VpmTS5xfio5EM1PXFJPAvCNHlP6gQX/PuB/UMA8nsKY+NEGdGMFpf69qtC5+piEl+s 9SGUAJGrAoS9RL0Zrm5zFq3Ff6sDbW84cwv9f8EgNnh9/52NU6VosZqxviv0ZRQxpyK57pxMVnrk0 EQEhJ7iyfOAaP3GNMBajvpAwMmgSTA06ZM6tNnSrgy3NxlELg1AraPS+6qs8f5PD9fiQKfn0RrhLL usIlgu6sr4BklC141vNwsCzVkpRSU0zGLNQNdW4Exo5F2i2UaJePi9SFCSqspofCsu6DFwEW4v+D5 Id+vvGQg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q6ftQ-003bN1-32; Tue, 06 Jun 2023 23:15:12 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q6ftO-003bLt-32 for linux-arm-kernel@bombadil.infradead.org; Tue, 06 Jun 2023 23:15:11 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:MIME-Version:References: In-Reply-To:Message-Id:Date:Subject:Cc:To:From:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description; bh=UYHkVZ09U5yILOG7yblaFqtFMiyncO4wxfZya4PpJv8=; b=qjlkEF9OWoBJ6kBqZfk52xcDHa hP6/CzSU524RzM11tqVVdWAGWzdC3AG+Tl/Sy3JY5uul0zHjImTuncI5BjhSZEf5fhhp+ZZ84/Jtd 3WGoWhcCwNSaF/vS3IJPAY4tHZEJvpOAL2mWb141SB+utLyvt350sAOX0UHDV6H9/rIIE/yFG9ZeQ aRMDV9xhk7MNXNs5jw5//CxdsqAJlHwE/KNEhmWJr6BfZpMu5aXaWqUU4y2B8C8wE/7KRAGNbMS1a 33SpI1dyv0gn0LNTGevBx9P4k0Lz88IiV2rlWl0kR7uXMW+5hibMLSl9GUUfXasCIu5e5C//6CqY5 Zhp7oZmw==; Received: from mail-qk1-x72c.google.com ([2607:f8b0:4864:20::72c]) by desiato.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q6fso-004DBV-1X for linux-arm-kernel@lists.infradead.org; Tue, 06 Jun 2023 23:14:44 +0000 Received: by mail-qk1-x72c.google.com with SMTP id af79cd13be357-75d536afa43so1864885a.1 for ; Tue, 06 Jun 2023 16:14:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1686093272; x=1688685272; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:from:to:cc:subject:date:message-id:reply-to; bh=UYHkVZ09U5yILOG7yblaFqtFMiyncO4wxfZya4PpJv8=; b=WKK555IhJywuiDxO/vcAqyAAobyIMk5foaRiv7+PGs25kkDXL4ivi7CkgrMt4UjvRz OT0jxPd1dQ+0S1sNtImApw4s/LvC8368AlYrWFqf7zgeeQx1uEbcKtTKHNkO6aSFNToL 3WbC6QLdCbtr/YKmyB7QWZF8KWIeTjBG61dpg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686093272; x=1688685272; h=mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=UYHkVZ09U5yILOG7yblaFqtFMiyncO4wxfZya4PpJv8=; b=WyaGwNlEgMIS2GUN5XIX6//+ATaU15FNWpA3DoZ1qseWp8qy7UQ4qQ3sD8oLrBmzri AnM9vKcirEfkNG1KFWv1WCFGtvKpwAT9aO73FStREbcIzJudMEpCLddcrF4l1NuSMMpT NgSA2tRGHht3JWeM5r3wZ/Ho0VwfmooRWdGhX/uSQYn3sJzaG5n8KM9/zAA4G8s+epZY 1fbGoOOQE75VqczUfNlY7u8mVN8vzt5XHZYdEJ8R7SWvhRto5cTZXEx3VC2tG0Xc833X d58q1gJd9sDVQG8peqIZlR3sBg+Gj9Ly85fmi3cV3ikFHNkfGWWoVVyYbFK8288GjnOP UL3A== X-Gm-Message-State: AC+VfDy7KIX4IY8ksBRun7CCU0ccbLiQgMxhrMcS/RDzMjGg70ANKkGO aUElq7InTbb/7JaheATvcprD0g== X-Google-Smtp-Source: ACHHUZ7UPhvmRNMHcXdrkJqI8JS17E1EEsrRMwwmJCIryUsTnOQU0RQbScDemOX+9Ivbl/J8K8IKbg== X-Received: by 2002:a37:e112:0:b0:75e:5141:f403 with SMTP id c18-20020a37e112000000b0075e5141f403mr12459qkm.23.1686093271889; Tue, 06 Jun 2023 16:14:31 -0700 (PDT) Received: from ubuntu-22.localdomain ([192.19.222.250]) by smtp.gmail.com with ESMTPSA id x9-20020ae9e909000000b0075b23e55640sm5221519qkf.123.2023.06.06.16.14.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 Jun 2023 16:14:31 -0700 (PDT) From: William Zhang To: Broadcom Kernel List , Linux MTD List Cc: f.fainelli@gmail.com, rafal@milecki.pl, kursad.oney@broadcom.com, joel.peshkin@broadcom.com, computersforpeace@gmail.com, anand.gore@broadcom.com, dregan@mail.com, kamal.dasu@broadcom.com, tomer.yacoby@broadcom.com, dan.beygelman@broadcom.com, William Zhang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Herring , linux-arm-kernel@lists.infradead.org Subject: [PATCH 06/12] ARM: dts: broadcom: bcmbca: Add NAND controller node Date: Tue, 6 Jun 2023 16:12:46 -0700 Message-Id: <20230606231252.94838-7-william.zhang@broadcom.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230606231252.94838-1-william.zhang@broadcom.com> References: <20230606231252.94838-1-william.zhang@broadcom.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230607_001437_779828_567EB13D X-CRM114-Status: GOOD ( 14.22 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add support for Broadcom STB NAND controller in BCMBCA ARMv7 chip dts files. Signed-off-by: William Zhang --- arch/arm/boot/dts/bcm47622.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm63138.dtsi | 12 ++++++++++-- arch/arm/boot/dts/bcm63148.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm63178.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6756.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6846.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6855.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm6878.dtsi | 17 +++++++++++++++++ arch/arm/boot/dts/bcm947622.dts | 4 ++++ arch/arm/boot/dts/bcm963138.dts | 4 ++++ arch/arm/boot/dts/bcm963138dvt.dts | 12 +++++------- arch/arm/boot/dts/bcm963148.dts | 4 ++++ arch/arm/boot/dts/bcm963178.dts | 4 ++++ arch/arm/boot/dts/bcm96756.dts | 4 ++++ arch/arm/boot/dts/bcm96846.dts | 4 ++++ arch/arm/boot/dts/bcm96855.dts | 4 ++++ arch/arm/boot/dts/bcm96878.dts | 4 ++++ 17 files changed, 166 insertions(+), 9 deletions(-) diff --git a/arch/arm/boot/dts/bcm47622.dtsi b/arch/arm/boot/dts/bcm47622.dtsi index cd25ed2757b7..401e1ce1da6d 100644 --- a/arch/arm/boot/dts/bcm47622.dtsi +++ b/arch/arm/boot/dts/bcm47622.dtsi @@ -137,6 +137,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi index 93281c47c9ba..2c9939e775fb 100644 --- a/arch/arm/boot/dts/bcm63138.dtsi +++ b/arch/arm/boot/dts/bcm63138.dtsi @@ -224,12 +224,20 @@ hsspi: spi@1000 { nand_controller: nand-controller@2000 { #address-cells = <1>; #size-cells = <0>; - compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand"; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.0", "brcm,brcmnand"; reg = <0x2000 0x600>, <0xf0 0x10>; reg-names = "nand", "nand-int-base"; status = "disabled"; interrupts = ; - interrupt-names = "nand"; + interrupt-names = "nand_ctlrdy"; + brcm,nand-use-wp = <0>; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; }; bootlut: bootlut@8000 { diff --git a/arch/arm/boot/dts/bcm63148.dtsi b/arch/arm/boot/dts/bcm63148.dtsi index ba7f265db121..de14d4564b14 100644 --- a/arch/arm/boot/dts/bcm63148.dtsi +++ b/arch/arm/boot/dts/bcm63148.dtsi @@ -118,5 +118,22 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x2000 0x600>, <0xf0 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; }; }; diff --git a/arch/arm/boot/dts/bcm63178.dtsi b/arch/arm/boot/dts/bcm63178.dtsi index d8268a1e889b..ae205408c5cd 100644 --- a/arch/arm/boot/dts/bcm63178.dtsi +++ b/arch/arm/boot/dts/bcm63178.dtsi @@ -128,6 +128,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm6756.dtsi b/arch/arm/boot/dts/bcm6756.dtsi index 49ecc1f0c18c..bbff47172dc1 100644 --- a/arch/arm/boot/dts/bcm6756.dtsi +++ b/arch/arm/boot/dts/bcm6756.dtsi @@ -138,6 +138,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm6846.dtsi b/arch/arm/boot/dts/bcm6846.dtsi index fbc7d3a5dc5f..26a36a577b44 100644 --- a/arch/arm/boot/dts/bcm6846.dtsi +++ b/arch/arm/boot/dts/bcm6846.dtsi @@ -118,5 +118,22 @@ hsspi: spi@1000 { num-cs = <8>; status = "disabled"; }; + + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; }; }; diff --git a/arch/arm/boot/dts/bcm6855.dtsi b/arch/arm/boot/dts/bcm6855.dtsi index 5e0fe26530f1..0defcc10ca8a 100644 --- a/arch/arm/boot/dts/bcm6855.dtsi +++ b/arch/arm/boot/dts/bcm6855.dtsi @@ -128,6 +128,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm6878.dtsi b/arch/arm/boot/dts/bcm6878.dtsi index 96529d3d4dc2..f6ae07fe1b44 100644 --- a/arch/arm/boot/dts/bcm6878.dtsi +++ b/arch/arm/boot/dts/bcm6878.dtsi @@ -119,6 +119,23 @@ hsspi: spi@1000 { status = "disabled"; }; + nand_controller: nand-controller@1800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,nand-bcmbca", "brcm,brcmnand-v7.1", "brcm,brcmnand"; + reg = <0x1800 0x600>, <0x2000 0x10>; + reg-names = "nand", "nand-int-base"; + brcm,nand-use-wp = <0>; + status = "disabled"; + + nandcs: nand@0 { + compatible = "brcm,nandcs"; + reg = <0>; + nand-on-flash-bbt; + brcm,nand-ecc-use-strap; + }; + }; + uart0: serial@12000 { compatible = "arm,pl011", "arm,primecell"; reg = <0x12000 0x1000>; diff --git a/arch/arm/boot/dts/bcm947622.dts b/arch/arm/boot/dts/bcm947622.dts index 93b8ce22678d..22e3c4508e1a 100644 --- a/arch/arm/boot/dts/bcm947622.dts +++ b/arch/arm/boot/dts/bcm947622.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm963138.dts b/arch/arm/boot/dts/bcm963138.dts index 1b405c249213..450289d47dc7 100644 --- a/arch/arm/boot/dts/bcm963138.dts +++ b/arch/arm/boot/dts/bcm963138.dts @@ -29,3 +29,7 @@ &serial0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm963138dvt.dts b/arch/arm/boot/dts/bcm963138dvt.dts index b5af61853a07..f2140e512070 100644 --- a/arch/arm/boot/dts/bcm963138dvt.dts +++ b/arch/arm/boot/dts/bcm963138dvt.dts @@ -33,14 +33,12 @@ &serial1 { &nand_controller { status = "okay"; +}; - nand@0 { - compatible = "brcm,nandcs"; - reg = <0>; - nand-ecc-strength = <4>; - nand-ecc-step-size = <512>; - brcm,nand-oob-sectors-size = <16>; - }; +&nandcs { + nand-ecc-strength = <4>; + nand-ecc-step-size = <512>; + brcm,nand-oob-sectors-size = <16>; }; &ahci { diff --git a/arch/arm/boot/dts/bcm963148.dts b/arch/arm/boot/dts/bcm963148.dts index 1f5d6d783f09..aa08b473c7cd 100644 --- a/arch/arm/boot/dts/bcm963148.dts +++ b/arch/arm/boot/dts/bcm963148.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm963178.dts b/arch/arm/boot/dts/bcm963178.dts index d036e99dd8d1..c0f504ac43a4 100644 --- a/arch/arm/boot/dts/bcm963178.dts +++ b/arch/arm/boot/dts/bcm963178.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96756.dts b/arch/arm/boot/dts/bcm96756.dts index 8b104f3fb14a..2ce998f2b84f 100644 --- a/arch/arm/boot/dts/bcm96756.dts +++ b/arch/arm/boot/dts/bcm96756.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96846.dts b/arch/arm/boot/dts/bcm96846.dts index 55852c229608..f4b9a07370ee 100644 --- a/arch/arm/boot/dts/bcm96846.dts +++ b/arch/arm/boot/dts/bcm96846.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96855.dts b/arch/arm/boot/dts/bcm96855.dts index 2ad880af2104..5c94063bceaf 100644 --- a/arch/arm/boot/dts/bcm96855.dts +++ b/arch/arm/boot/dts/bcm96855.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +}; diff --git a/arch/arm/boot/dts/bcm96878.dts b/arch/arm/boot/dts/bcm96878.dts index b7af8ade7a9d..910f7e125bad 100644 --- a/arch/arm/boot/dts/bcm96878.dts +++ b/arch/arm/boot/dts/bcm96878.dts @@ -32,3 +32,7 @@ &uart0 { &hsspi { status = "okay"; }; + +&nand_controller { + status = "okay"; +};