diff mbox series

[v1,2/6] dt-bindings: reset: mt8188: Add reset control bits for VDOSYS1

Message ID 20230607061121.6732-3-shawn.sung@mediatek.com (mailing list archive)
State New, archived
Headers show
Series Add display driver for MT8188 VDOSYS1 | expand

Commit Message

Shawn Sung (宋孝謙) June 7, 2023, 6:11 a.m. UTC
Add reset control bits for  MT8188 VDOSYS1.

Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
---
 include/dt-bindings/reset/mt8188-resets.h | 12 ++++++++++++
 1 file changed, 12 insertions(+)

--
2.18.0

Comments

Krzysztof Kozlowski June 7, 2023, 7:27 a.m. UTC | #1
On 07/06/2023 08:11, Hsiao Chien Sung wrote:
> Add reset control bits for  MT8188 VDOSYS1.

Double space -> one space.

> 
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
>  include/dt-bindings/reset/mt8188-resets.h | 12 ++++++++++++

This should be squashed with patch adding compatible.


>  1 file changed, 12 insertions(+)
> 
> diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
> index 377cdfda82a9..439a9a25ca19 100644
> --- a/include/dt-bindings/reset/mt8188-resets.h
> +++ b/include/dt-bindings/reset/mt8188-resets.h
> @@ -33,4 +33,16 @@
> 
>  #define MT8188_TOPRGU_SW_RST_NUM               24
> 
> +/* VDOSYS1 */
> +#define MT8188_VDO1_RST_MERGE0_DL_ASYNC         9

Indices start from 0.

> +#define MT8188_VDO1_RST_MERGE1_DL_ASYNC         10
> +#define MT8188_VDO1_RST_MERGE2_DL_ASYNC         11
> +#define MT8188_VDO1_RST_MERGE3_DL_ASYNC         32

... and are continuous.

Commit explains here nothing that it is for existing reset, so you got
such review.

Best regards,
Krzysztof
AngeloGioacchino Del Regno June 7, 2023, 7:37 a.m. UTC | #2
Il 07/06/23 08:11, Hsiao Chien Sung ha scritto:
> Add reset control bits for  MT8188 VDOSYS1.
> 
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
AngeloGioacchino Del Regno June 7, 2023, 7:51 a.m. UTC | #3
Il 07/06/23 08:11, Hsiao Chien Sung ha scritto:
> Add reset control bits for  MT8188 VDOSYS1.
> 
> Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> ---
>   include/dt-bindings/reset/mt8188-resets.h | 12 ++++++++++++
>   1 file changed, 12 insertions(+)
> 
> diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
> index 377cdfda82a9..439a9a25ca19 100644
> --- a/include/dt-bindings/reset/mt8188-resets.h
> +++ b/include/dt-bindings/reset/mt8188-resets.h
> @@ -33,4 +33,16 @@
> 
>   #define MT8188_TOPRGU_SW_RST_NUM               24
> 
> +/* VDOSYS1 */
> +#define MT8188_VDO1_RST_MERGE0_DL_ASYNC         9

Sorry, I've just noticed that there's no index 0 in previous definitions: this
is wrong, it must start from 0 and must be sequential.
Shawn Sung (宋孝謙) June 8, 2023, 3:01 a.m. UTC | #4
Hi AngeloGioacchino,

Should I use enum instead of #define if reset ID must starts from 0?

Thanks,
Hsiao Chien Sung

On Wed, 2023-06-07 at 09:51 +0200, AngeloGioacchino Del Regno wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  
> Il 07/06/23 08:11, Hsiao Chien Sung ha scritto:
> > Add reset control bits for  MT8188 VDOSYS1.
> > 
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > ---
> >   include/dt-bindings/reset/mt8188-resets.h | 12 ++++++++++++
> >   1 file changed, 12 insertions(+)
> > 
> > diff --git a/include/dt-bindings/reset/mt8188-resets.h
> b/include/dt-bindings/reset/mt8188-resets.h
> > index 377cdfda82a9..439a9a25ca19 100644
> > --- a/include/dt-bindings/reset/mt8188-resets.h
> > +++ b/include/dt-bindings/reset/mt8188-resets.h
> > @@ -33,4 +33,16 @@
> > 
> >   #define MT8188_TOPRGU_SW_RST_NUM               24
> > 
> > +/* VDOSYS1 */
> > +#define MT8188_VDO1_RST_MERGE0_DL_ASYNC         9
> 
> Sorry, I've just noticed that there's no index 0 in previous
> definitions: this
> is wrong, it must start from 0 and must be sequential.
> 
>
Shawn Sung (宋孝謙) June 8, 2023, 3:07 a.m. UTC | #5
Hi Krzysztof,

Got it, I'll squash this commit with the one adds compatible, and
commit another patch to modify mmsys reset control to handle the new
rule of indexing.

Thanks,
Hsiao Chien Sung

On Wed, 2023-06-07 at 09:27 +0200, Krzysztof Kozlowski wrote:
>  	 
> External email : Please do not click links or open attachments until
> you have verified the sender or the content.
>  
> On 07/06/2023 08:11, Hsiao Chien Sung wrote:
> > Add reset control bits for  MT8188 VDOSYS1.
> 
> Double space -> one space.
> 
> > 
> > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > ---
> >  include/dt-bindings/reset/mt8188-resets.h | 12 ++++++++++++
> 
> This should be squashed with patch adding compatible.
> 
> 
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/include/dt-bindings/reset/mt8188-resets.h
> b/include/dt-bindings/reset/mt8188-resets.h
> > index 377cdfda82a9..439a9a25ca19 100644
> > --- a/include/dt-bindings/reset/mt8188-resets.h
> > +++ b/include/dt-bindings/reset/mt8188-resets.h
> > @@ -33,4 +33,16 @@
> > 
> >  #define MT8188_TOPRGU_SW_RST_NUM               24
> > 
> > +/* VDOSYS1 */
> > +#define MT8188_VDO1_RST_MERGE0_DL_ASYNC         9
> 
> Indices start from 0.
> 
> > +#define MT8188_VDO1_RST_MERGE1_DL_ASYNC         10
> > +#define MT8188_VDO1_RST_MERGE2_DL_ASYNC         11
> > +#define MT8188_VDO1_RST_MERGE3_DL_ASYNC         32
> 
> ... and are continuous.
> 
> Commit explains here nothing that it is for existing reset, so you
> got
> such review.
> 
> Best regards,
> Krzysztof
>
Shawn Sung (宋孝謙) June 8, 2023, 6:15 a.m. UTC | #6
Update:

It seems device tree doesn't accept enum.
I'll use #define here.

On Thu, 2023-06-08 at 11:01 +0800, shawn.sung wrote:
> Hi AngeloGioacchino,
> 
> Should I use enum instead of #define if reset ID must starts from 0?
> 
> Thanks,
> Hsiao Chien Sung
> 
> On Wed, 2023-06-07 at 09:51 +0200, AngeloGioacchino Del Regno wrote:
> >  	 
> > External email : Please do not click links or open attachments
> > until
> > you have verified the sender or the content.
> >  
> > Il 07/06/23 08:11, Hsiao Chien Sung ha scritto:
> > > Add reset control bits for  MT8188 VDOSYS1.
> > > 
> > > Signed-off-by: Hsiao Chien Sung <shawn.sung@mediatek.com>
> > > ---
> > >   include/dt-bindings/reset/mt8188-resets.h | 12 ++++++++++++
> > >   1 file changed, 12 insertions(+)
> > > 
> > > diff --git a/include/dt-bindings/reset/mt8188-resets.h
> > 
> > b/include/dt-bindings/reset/mt8188-resets.h
> > > index 377cdfda82a9..439a9a25ca19 100644
> > > --- a/include/dt-bindings/reset/mt8188-resets.h
> > > +++ b/include/dt-bindings/reset/mt8188-resets.h
> > > @@ -33,4 +33,16 @@
> > > 
> > >   #define MT8188_TOPRGU_SW_RST_NUM               24
> > > 
> > > +/* VDOSYS1 */
> > > +#define MT8188_VDO1_RST_MERGE0_DL_ASYNC         9
> > 
> > Sorry, I've just noticed that there's no index 0 in previous
> > definitions: this
> > is wrong, it must start from 0 and must be sequential.
> > 
> >
Krzysztof Kozlowski June 8, 2023, 7:56 a.m. UTC | #7
On 08/06/2023 05:01, Shawn Sung (宋孝謙) wrote:
> Hi AngeloGioacchino,
> 
> Should I use enum instead of #define if reset ID must starts from 0?

Open existing bindings (there are many, many files) which will give you
the answer. It will be faster than asking us and you will learn something.

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/include/dt-bindings/reset/mt8188-resets.h b/include/dt-bindings/reset/mt8188-resets.h
index 377cdfda82a9..439a9a25ca19 100644
--- a/include/dt-bindings/reset/mt8188-resets.h
+++ b/include/dt-bindings/reset/mt8188-resets.h
@@ -33,4 +33,16 @@ 

 #define MT8188_TOPRGU_SW_RST_NUM               24

+/* VDOSYS1 */
+#define MT8188_VDO1_RST_MERGE0_DL_ASYNC         9
+#define MT8188_VDO1_RST_MERGE1_DL_ASYNC         10
+#define MT8188_VDO1_RST_MERGE2_DL_ASYNC         11
+#define MT8188_VDO1_RST_MERGE3_DL_ASYNC         32
+#define MT8188_VDO1_RST_MERGE4_DL_ASYNC         33
+#define MT8188_VDO1_RST_HDR_VDO_FE0_DL_ASYNC    64
+#define MT8188_VDO1_RST_HDR_GFX_FE0_DL_ASYNC    65
+#define MT8188_VDO1_RST_HDR_VDO_BE_DL_ASYNC     66
+#define MT8188_VDO1_RST_HDR_VDO_FE1_DL_ASYNC    80
+#define MT8188_VDO1_RST_HDR_GFX_FE1_DL_ASYNC    81
+
 #endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT8188 */