From patchwork Wed Jun 14 07:31:14 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?U2hhd24gU3VuZyAo5a6L5a2d6KyZKQ==?= X-Patchwork-Id: 13279652 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 44212EB64DB for ; Wed, 14 Jun 2023 07:32:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=W6FMnlXofRqPQfndzdlrhJ+6YRARW72o4YrL7cCXrAk=; b=Ed4PXYsFQo9Njz QoSL5I81niDRXnrVAfbrtMmLzGEYMoqpWUSBMMwHSCHlW7yhrXdeUcRQc70pPDn9g/9Y1ssX3LD5t qzA9mDS+/BI1+58oy+hyVv/vjo6yow7ygJnIWFQVEOBVqb/j2uDXSYoTSPh6Og2psehisoU6JaY7+ o9v8NAZ/htfeclW3Fjzt5kjFTfhSYLmUOmGcXTS+yCUpyvSJy9ZIEWEgul54Jh1BEjd24WZwo/NB2 H/Gu8ENqbkqxJddT92RhtTjVRsQ+GttZPSb9ndq/ETfe7b6mqp9U2iGBJ2Wgl2rupT/PslDz4OrGB 3L2RgrjsFzDMElmd+0ew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q9Kz3-00AgQW-0x; Wed, 14 Jun 2023 07:32:01 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q9Kyt-00AgJY-11; Wed, 14 Jun 2023 07:31:53 +0000 X-UUID: 850349220a8511ee912e1518a6540028-20230614 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=FkEHz1HvqkgwBa8saRQQZi20/yHJXurrVKHsWWSGwMk=; b=sABsMQoQmRGRhHTmlGldAF2Zdyl5hyacI5Ih5ZQu5fUs4wITWyoFrtRj8qkQz5mREoww9uX1gPAD+iL8wQtBgNuPXkYURyc3S3K2vG3DKCz411cu1ql019aAHtLtA3K27Z73b1i89nD02GohaaOUlHFICIZeSqgxbrQ5YexSRME=; X-CID-P-RULE: Spam_GS6885AD X-CID-O-INFO: VERSION:1.1.26,REQID:1ba51b1d-b051-4e66-8090-c8e94326d6d8,IP:0,U RL:25,TC:0,Content:-5,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS6885AD,A CTION:quarantine,TS:120 X-CID-INFO: VERSION:1.1.26,REQID:1ba51b1d-b051-4e66-8090-c8e94326d6d8,IP:0,URL :25,TC:0,Content:-5,EDM:0,RT:0,SF:100,FILE:0,BULK:0,RULE:Spam_GS981B3D,ACT ION:quarantine,TS:120 X-CID-META: VersionHash:cb9a4e1,CLOUDID:5d49933e-7aa7-41f3-a6bd-0433bee822f3,B ulkID:230614153150Z8UKLSIA,BulkQuantity:0,Recheck:0,SF:17|19|48|38|29|28,T C:nil,Content:0,EDM:-3,IP:nil,URL:11|1,File:nil,Bulk:nil,QS:nil,BEC:nil,CO L:0,OSI:0,OSA:0,AV:0,LES:1,SPR:NO X-CID-BVR: 0 X-CID-BAS: 0,_,0,_ X-CID-FACTOR: TF_CID_SPAM_FSD,TF_CID_SPAM_ULN,TF_CID_SPAM_SNR,TF_CID_SPAM_SDM, TF_CID_SPAM_ASC,TF_CID_SPAM_FAS X-UUID: 850349220a8511ee912e1518a6540028-20230614 Received: from mtkmbs13n1.mediatek.inc [(172.21.101.193)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1631195550; Wed, 14 Jun 2023 00:31:47 -0700 Received: from mtkmbs13n2.mediatek.inc (172.21.101.108) by mtkmbs11n1.mediatek.inc (172.21.101.185) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.26; Wed, 14 Jun 2023 15:31:44 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkmbs13n2.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1118.26 via Frontend Transport; Wed, 14 Jun 2023 15:31:44 +0800 From: Hsiao Chien Sung To: Chun-Kuang Hu , Matthias Brugger , AngeloGioacchino Del Regno , Philipp Zabel , Rob Herring , Krzysztof Kozlowski CC: , , , , , Singo Chang , Nancy Lin , Jason-JH Lin , Shawn Sung Subject: [PATCH v2 04/15] dt-bindings: display: mediatek: padding: Add documentation for MT8188 Date: Wed, 14 Jun 2023 15:31:14 +0800 Message-ID: <20230614073125.17958-5-shawn.sung@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20230614073125.17958-1-shawn.sung@mediatek.com> References: <20230614073125.17958-1-shawn.sung@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230614_003151_361017_F3277F4A X-CRM114-Status: GOOD ( 17.56 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org PADDING is a new hardware module on MediaTek MT8188, Add device tree bindings documentation for it. Signed-off-by: Hsiao Chien Sung --- .../display/mediatek/mediatek,padding.yaml | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml -- 2.18.0 diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml new file mode 100644 index 000000000000..390a518fa2cf --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,padding.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek/mediatek,padding.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MediaTek PADDING + +maintainers: + - Chun-Kuang Hu + - Philipp Zabel + +description: + MediaTek PADDING provides ability to VDOSYS1 to add pixels to width and height + of a layer with a specified color. + Since MIXER in VDOSYS1 requires the width of a layer to be 2-pixel-align, or + 4-pixel-align when ETHDR is enabled, we need PADDING to deal with odd width. + Please notice that even if the PADDING is in bypass mode, settings in the + registers must be cleared to 0, or undefined behaviors could happen. + +properties: + compatible: + const: mediatek,mt8188-padding + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + items: + - description: RDMA Clock + + mediatek,gce-client-reg: + description: + GCE (Global Command Engine) is a multi-core micro processor that helps + its clients to execute commands without interrupting CPU. This property + describes GCE client's information that is composed by 4 fields. + 1. pHandle of the GCE (there may be several GCE processors) + 2. Sub-system ID defined in the dt-binding like a user ID + (Please refer to include/dt-bindings/gce/-gce.h) + 3. Offset from base address of the subsys you are at + 4. Size of the register the client needs + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + items: + - description: pHandle of the GCE + - description: Subsys ID defined in the dt-binding + - description: Offset from base address of the subsys + - description: Size of register + maxItems: 1 + +required: + - compatible + - reg + - power-domains + - clocks + - mediatek,gce-client-reg + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + padding0: padding@1c11d000 { + compatible = "mediatek,mt8188-padding"; + reg = <0 0x1c11d000 0 0x1000>; + clocks = <&vdosys1 CLK_VDO1_PADDING0>; + power-domains = <&spm MT8188_POWER_DOMAIN_VDOSYS1>; + mediatek,gce-client-reg = <&gce0 SUBSYS_1c11XXXX 0xd000 0x1000>; + }; + };