From patchwork Thu Jun 15 12:17:31 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Teresa Remmet X-Patchwork-Id: 13281221 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7C548EB64DD for ; Thu, 15 Jun 2023 12:18:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JXW9RNADtvLkHMGnhRP9CGN+Eo+L1juP179gsZtHsbc=; b=qMvkAgFW1d+hWp qXxgasUl8/R8IYYo0wyFFy569tfArc3SDIKEMXVMeCgeMq5eLDKV3ou+WlGpdb4TWqmQZrLLMQMwi FwGwRAV7fAlt+ezQHviIPVkCBlp8ApIXEVgGqLWJTSUxER3IMA2PqgjKjIpReFQOyh9xWXVtFKoR7 ulZ7V9S4rptdOC6dOMxoUKhCXCYtlVeRhWD+eMplasqmbM8mANQCgB3WK1TpfOW68oMTRZ2D5NKDJ FeH1iy2PqnP9AJmI130MEwHWneTR+Uw21P8ibX3oOGIX3IzqOETVyPNTzIZSfymmcw6aZzvATxY8x dT/JzwtyVJS7mCCzqdfw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.96 #2 (Red Hat Linux)) id 1q9lvR-00EqxJ-33; Thu, 15 Jun 2023 12:18:05 +0000 Received: from mickerik.phytec.de ([91.26.50.163]) by bombadil.infradead.org with esmtps (Exim 4.96 #2 (Red Hat Linux)) id 1q9lvH-00Eqpz-1F for linux-arm-kernel@lists.infradead.org; Thu, 15 Jun 2023 12:17:56 +0000 DKIM-Signature: v=1; a=rsa-sha256; d=phytec.de; s=a4; c=relaxed/simple; q=dns/txt; i=@phytec.de; t=1686831465; x=1689423465; h=From:Sender:Reply-To:Subject:Date:Message-ID:To:CC:MIME-Version:Content-Type: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=gthLcEbQ/2SSsy1QwSBFQMgHeUarTv51NDQaLkR9ytY=; b=MD5vRGctD9yWIJOXGrrBPNf/6/1MFMu8c8PJ0NerN0NH96VeF3GnmuFNqKHIGV7C p9/TzYc+c8ENeQjkXOb3LEUGMSsRkDNcdAM5xiYC4+Dt0bFEOwoIC1S6lQdjH4wb xxM6KKtYXJLH1grN3L2P3XqbVdj42N+mhcodigSLgQ8=; X-AuditID: ac14000a-917fe70000007ecb-41-648b0169eb93 Received: from berlix.phytec.de (Unknown_Domain [172.25.0.12]) (using TLS with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) by mickerik.phytec.de (PHYTEC Mail Gateway) with SMTP id 48.FF.32459.9610B846; Thu, 15 Jun 2023 14:17:45 +0200 (CEST) Received: from augenblix2.phytec.de (172.25.0.11) by Berlix.phytec.de (172.25.0.12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.18; Thu, 15 Jun 2023 14:17:45 +0200 From: Teresa Remmet To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team CC: , Subject: [PATCH 3/7] arm64: dts: imx8mp-phycore-som: Correct pad settings Date: Thu, 15 Jun 2023 14:17:31 +0200 Message-ID: <20230615121735.614024-4-t.remmet@phytec.de> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230615121735.614024-1-t.remmet@phytec.de> References: <20230615121735.614024-1-t.remmet@phytec.de> MIME-Version: 1.0 X-Originating-IP: [172.25.0.11] X-ClientProxiedBy: Berlix.phytec.de (172.25.0.12) To Berlix.phytec.de (172.25.0.12) X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrOLMWRmVeSWpSXmKPExsWyRpKBRzeTsTvFoPOfvMWaveeYLB5e9bdY NXUni0Xfi4fMFpseX2O16Pq1ktmide8Rdou/2zexWLzYIm7R/U7dgctj56y77B6bVnWyedy5 tofNY/OSeo/+7hZWj43vdjB59P81CGCP4rJJSc3JLEst0rdL4Mo4/H0zc8F64Yp9/SYNjDMF uhg5OSQETCQuP7jC1sXIxSEksIRJYsOxv2wgCSGBJ4wS2y9VgNhsAhoST1ecZgIpEhE4xSSx +sQMZpAEs4CbxL+N89lBbGEBT4nn+/6ygtgsAqoSB348ZQKxeQUsJFpO/WCE2CYvMfPSd7B6 TgFLiU2tx5ghlllIdH5cClUvKHFy5hMWiPnyEs1bZ0PtkpA4+OIFVL28xK5LJ+FmTjv3mhnC DpXY+mU70wRGoVlIRs1CMmoWklELGJlXMQrlZiZnpxZlZusVZFSWpCbrpaRuYgRFjggD1w7G vjkehxiZOBgPMUpwMCuJ8C470ZUixJuSWFmVWpQfX1Sak1p8iFGag0VJnPd+D1OikEB6Yklq dmpqQWoRTJaJg1OqgTH7W/iLtY4H/29QWnt2ziS7h18u/ui7mxO1f3L8D96TfAscQnWfBrWc eF/l0T1DxdLki11EirTAgqn3WJcwdbXM/8P+ZAmrYMUirUPBhWv89J/5GsvvdnI3L//slHXr 2oODFmovV5f9ltnUZNPRs99zSdMbPQeN3ZMXvTGVsDUJP/J77eQJDNJKLMUZiYZazEXFiQCR F7P4igIAAA== X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230615_051755_572086_0D191058 X-CRM114-Status: UNSURE ( 9.72 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Do not set reserved bits 0 and 3 in pad configuration. Signed-off-by: Teresa Remmet --- .../dts/freescale/imx8mp-phycore-som.dtsi | 26 +++++++++---------- 1 file changed, 13 insertions(+), 13 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi index 7970fa6f2a28..8e06cb6f522b 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi @@ -206,20 +206,20 @@ &wdog1 { &iomuxc { pinctrl_fec: fecgrp { fsl,pins = < - MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x3 - MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x3 - MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x91 - MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x91 - MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x91 - MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x91 - MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x91 + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x12 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x12 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x14 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x14 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x14 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x14 - MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x91 + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 >; }; @@ -236,21 +236,21 @@ MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03 0x82 pinctrl_i2c1: i2c1grp { fsl,pins = < - MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3 - MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 >; }; pinctrl_i2c1_gpio: i2c1gpiogrp { fsl,pins = < - MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e3 - MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e3 + MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14 0x1e2 + MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15 0x1e2 >; }; pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x141 + MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x140 >; };